OneStart

Menu
Fujitsu MB86R02 Jade-D Hardware Manual Manual pdf 834 page image

Fujitsu MB86R02 Jade-D Hardware Manual

Also see for MB86R02: Application note

Page 1 previewPage 2 previewPage 3 previewPage 4 previewPage 5 previewPage 6 previewPage 7 previewPage 8 previewPage 9 previewPage 10 previewPage 11 previewPage 12 previewPage 13 previewPage 14 previewPage 15 previewPage 16 previewPage 17 previewPage 18 previewPage 19 previewPage 20 previewPage 21 previewPage 22 previewPage 23 previewPage 24 previewPage 25 previewPage 26 previewPage 27 previewPage 28 previewPage 29 previewPage 30 previewPage 31 previewPage 32 previewPage 33 previewPage 34 previewPage 35 previewPage 36 previewPage 37 previewPage 38 previewPage 39 previewPage 40 previewPage 41 previewPage 42 previewPage 43 previewPage 44 previewPage 45 previewPage 46 previewPage 47 previewPage 48 previewPage 49 previewPage 50 previewPage 51 previewPage 52 previewPage 53 previewPage 54 previewPage 55 previewPage 56 previewPage 57 previewPage 58 previewPage 59 previewPage 60 previewPage 61 previewPage 62 previewPage 63 previewPage 64 previewPage 65 previewPage 66 previewPage 67 previewPage 68 previewPage 69 previewPage 70 previewPage 71 previewPage 72 previewPage 73 previewPage 74 previewPage 75 previewPage 76 previewPage 77 previewPage 78 previewPage 79 previewPage 80 previewPage 81 previewPage 82 previewPage 83 previewPage 84 previewPage 85 previewPage 86 previewPage 87 previewPage 88 previewPage 89 previewPage 90 previewPage 91 previewPage 92 previewPage 93 previewPage 94 previewPage 95 previewPage 96 previewPage 97 previewPage 98 previewPage 99 previewPage 100 previewPage 101 previewPage 102 previewPage 103 previewPage 104 previewPage 105 previewPage 106 previewPage 107 previewPage 108 previewPage 109 previewPage 110 previewPage 111 previewPage 112 previewPage 113 previewPage 114 previewPage 115 previewPage 116 previewPage 117 previewPage 118 previewPage 119 previewPage 120 previewPage 121 previewPage 122 previewPage 123 previewPage 124 previewPage 125 previewPage 126 previewPage 127 previewPage 128 previewPage 129 previewPage 130 previewPage 131 previewPage 132 previewPage 133 previewPage 134 previewPage 135 previewPage 136 previewPage 137 previewPage 138 previewPage 139 previewPage 140 previewPage 141 previewPage 142 previewPage 143 previewPage 144 previewPage 145 previewPage 146 previewPage 147 previewPage 148 previewPage 149 previewPage 150 previewPage 151 previewPage 152 previewPage 153 previewPage 154 previewPage 155 previewPage 156 previewPage 157 previewPage 158 previewPage 159 previewPage 160 previewPage 161 previewPage 162 previewPage 163 previewPage 164 previewPage 165 previewPage 166 previewPage 167 previewPage 168 previewPage 169 previewPage 170 previewPage 171 previewPage 172 previewPage 173 previewPage 174 previewPage 175 previewPage 176 previewPage 177 previewPage 178 previewPage 179 previewPage 180 previewPage 181 previewPage 182 previewPage 183 previewPage 184 previewPage 185 previewPage 186 previewPage 187 previewPage 188 previewPage 189 previewPage 190 previewPage 191 previewPage 192 previewPage 193 previewPage 194 previewPage 195 previewPage 196 previewPage 197 previewPage 198 previewPage 199 previewPage 200 previewPage 201 previewPage 202 previewPage 203 previewPage 204 previewPage 205 previewPage 206 previewPage 207 previewPage 208 previewPage 209 previewPage 210 previewPage 211 previewPage 212 previewPage 213 previewPage 214 previewPage 215 previewPage 216 previewPage 217 previewPage 218 previewPage 219 previewPage 220 previewPage 221 previewPage 222 previewPage 223 previewPage 224 previewPage 225 previewPage 226 previewPage 227 previewPage 228 previewPage 229 previewPage 230 previewPage 231 previewPage 232 previewPage 233 previewPage 234 previewPage 235 previewPage 236 previewPage 237 previewPage 238 previewPage 239 previewPage 240 previewPage 241 previewPage 242 previewPage 243 previewPage 244 previewPage 245 previewPage 246 previewPage 247 previewPage 248 previewPage 249 previewPage 250 previewPage 251 previewPage 252 previewPage 253 previewPage 254 previewPage 255 previewPage 256 previewPage 257 previewPage 258 previewPage 259 previewPage 260 previewPage 261 previewPage 262 previewPage 263 previewPage 264 previewPage 265 previewPage 266 previewPage 267 previewPage 268 previewPage 269 previewPage 270 previewPage 271 previewPage 272 previewPage 273 previewPage 274 previewPage 275 previewPage 276 previewPage 277 previewPage 278 previewPage 279 previewPage 280 previewPage 281 previewPage 282 previewPage 283 previewPage 284 previewPage 285 previewPage 286 previewPage 287 previewPage 288 previewPage 289 previewPage 290 previewPage 291 previewPage 292 previewPage 293 previewPage 294 previewPage 295 previewPage 296 previewPage 297 previewPage 298 previewPage 299 previewPage 300 previewPage 301 previewPage 302 previewPage 303 previewPage 304 previewPage 305 previewPage 306 previewPage 307 previewPage 308 previewPage 309 previewPage 310 previewPage 311 previewPage 312 previewPage 313 previewPage 314 previewPage 315 previewPage 316 previewPage 317 previewPage 318 previewPage 319 previewPage 320 previewPage 321 previewPage 322 previewPage 323 previewPage 324 previewPage 325 previewPage 326 previewPage 327 previewPage 328 previewPage 329 previewPage 330 previewPage 331 previewPage 332 previewPage 333 previewPage 334 previewPage 335 previewPage 336 previewPage 337 previewPage 338 previewPage 339 previewPage 340 previewPage 341 previewPage 342 previewPage 343 previewPage 344 previewPage 345 previewPage 346 previewPage 347 previewPage 348 previewPage 349 previewPage 350 previewPage 351 previewPage 352 previewPage 353 previewPage 354 previewPage 355 previewPage 356 previewPage 357 previewPage 358 previewPage 359 previewPage 360 previewPage 361 previewPage 362 previewPage 363 previewPage 364 previewPage 365 previewPage 366 previewPage 367 previewPage 368 previewPage 369 previewPage 370 previewPage 371 previewPage 372 previewPage 373 previewPage 374 previewPage 375 previewPage 376 previewPage 377 previewPage 378 previewPage 379 previewPage 380 previewPage 381 previewPage 382 previewPage 383 previewPage 384 previewPage 385 previewPage 386 previewPage 387 previewPage 388 previewPage 389 previewPage 390 previewPage 391 previewPage 392 previewPage 393 previewPage 394 previewPage 395 previewPage 396 previewPage 397 previewPage 398 previewPage 399 previewPage 400 previewPage 401 previewPage 402 previewPage 403 previewPage 404 previewPage 405 previewPage 406 previewPage 407 previewPage 408 previewPage 409 previewPage 410 previewPage 411 previewPage 412 previewPage 413 previewPage 414 previewPage 415 previewPage 416 previewPage 417 previewPage 418 previewPage 419 previewPage 420 previewPage 421 previewPage 422 previewPage 423 previewPage 424 previewPage 425 previewPage 426 previewPage 427 previewPage 428 previewPage 429 previewPage 430 previewPage 431 previewPage 432 previewPage 433 previewPage 434 previewPage 435 previewPage 436 previewPage 437 previewPage 438 previewPage 439 previewPage 440 previewPage 441 previewPage 442 previewPage 443 previewPage 444 previewPage 445 previewPage 446 previewPage 447 previewPage 448 previewPage 449 previewPage 450 previewPage 451 previewPage 452 previewPage 453 previewPage 454 previewPage 455 previewPage 456 previewPage 457 previewPage 458 previewPage 459 previewPage 460 previewPage 461 previewPage 462 previewPage 463 previewPage 464 previewPage 465 previewPage 466 previewPage 467 previewPage 468 previewPage 469 previewPage 470 previewPage 471 previewPage 472 previewPage 473 previewPage 474 previewPage 475 previewPage 476 previewPage 477 previewPage 478 previewPage 479 previewPage 480 previewPage 481 previewPage 482 previewPage 483 previewPage 484 previewPage 485 previewPage 486 previewPage 487 previewPage 488 previewPage 489 previewPage 490 previewPage 491 previewPage 492 previewPage 493 previewPage 494 previewPage 495 previewPage 496 previewPage 497 previewPage 498 previewPage 499 previewPage 500 previewPage 501 previewPage 502 previewPage 503 previewPage 504 previewPage 505 previewPage 506 previewPage 507 previewPage 508 previewPage 509 previewPage 510 previewPage 511 previewPage 512 previewPage 513 previewPage 514 previewPage 515 previewPage 516 previewPage 517 previewPage 518 previewPage 519 previewPage 520 previewPage 521 previewPage 522 previewPage 523 previewPage 524 previewPage 525 previewPage 526 previewPage 527 previewPage 528 previewPage 529 previewPage 530 previewPage 531 previewPage 532 previewPage 533 previewPage 534 previewPage 535 previewPage 536 previewPage 537 previewPage 538 previewPage 539 previewPage 540 previewPage 541 previewPage 542 previewPage 543 previewPage 544 previewPage 545 previewPage 546 previewPage 547 previewPage 548 previewPage 549 previewPage 550 previewPage 551 previewPage 552 previewPage 553 previewPage 554 previewPage 555 previewPage 556 previewPage 557 previewPage 558 previewPage 559 previewPage 560 previewPage 561 previewPage 562 previewPage 563 previewPage 564 previewPage 565 previewPage 566 previewPage 567 previewPage 568 previewPage 569 previewPage 570 previewPage 571 previewPage 572 previewPage 573 previewPage 574 previewPage 575 previewPage 576 previewPage 577 previewPage 578 previewPage 579 previewPage 580 previewPage 581 previewPage 582 previewPage 583 previewPage 584 previewPage 585 previewPage 586 previewPage 587 previewPage 588 previewPage 589 previewPage 590 previewPage 591 previewPage 592 previewPage 593 previewPage 594 previewPage 595 previewPage 596 previewPage 597 previewPage 598 previewPage 599 previewPage 600 previewPage 601 previewPage 602 previewPage 603 previewPage 604 previewPage 605 previewPage 606 previewPage 607 previewPage 608 previewPage 609 previewPage 610 previewPage 611 previewPage 612 previewPage 613 previewPage 614 previewPage 615 previewPage 616 previewPage 617 previewPage 618 previewPage 619 previewPage 620 previewPage 621 previewPage 622 previewPage 623 previewPage 624 previewPage 625 previewPage 626 previewPage 627 previewPage 628 previewPage 629 previewPage 630 previewPage 631 previewPage 632 previewPage 633 previewPage 634 previewPage 635 previewPage 636 previewPage 637 previewPage 638 previewPage 639 previewPage 640 previewPage 641 previewPage 642 previewPage 643 previewPage 644 previewPage 645 previewPage 646 previewPage 647 previewPage 648 previewPage 649 previewPage 650 previewPage 651 previewPage 652 previewPage 653 previewPage 654 previewPage 655 previewPage 656 previewPage 657 previewPage 658 previewPage 659 previewPage 660 previewPage 661 previewPage 662 previewPage 663 previewPage 664 previewPage 665 previewPage 666 previewPage 667 previewPage 668 previewPage 669 previewPage 670 previewPage 671 previewPage 672 previewPage 673 previewPage 674 previewPage 675 previewPage 676 previewPage 677 previewPage 678 previewPage 679 previewPage 680 previewPage 681 previewPage 682 previewPage 683 previewPage 684 previewPage 685 previewPage 686 previewPage 687 previewPage 688 previewPage 689 previewPage 690 previewPage 691 previewPage 692 previewPage 693 previewPage 694 previewPage 695 previewPage 696 previewPage 697 previewPage 698 previewPage 699 previewPage 700 previewPage 701 previewPage 702 previewPage 703 previewPage 704 previewPage 705 previewPage 706 previewPage 707 previewPage 708 previewPage 709 previewPage 710 previewPage 711 previewPage 712 previewPage 713 previewPage 714 previewPage 715 previewPage 716 previewPage 717 previewPage 718 previewPage 719 previewPage 720 previewPage 721 previewPage 722 previewPage 723 previewPage 724 previewPage 725 previewPage 726 previewPage 727 previewPage 728 previewPage 729 previewPage 730 previewPage 731 previewPage 732 previewPage 733 previewPage 734 previewPage 735 previewPage 736 previewPage 737 previewPage 738 previewPage 739 previewPage 740 previewPage 741 previewPage 742 previewPage 743 previewPage 744 previewPage 745 previewPage 746 previewPage 747 previewPage 748 previewPage 749 previewPage 750 previewPage 751 previewPage 752 previewPage 753 previewPage 754 previewPage 755 previewPage 756 previewPage 757 previewPage 758 previewPage 759 previewPage 760 previewPage 761 previewPage 762 previewPage 763 previewPage 764 previewPage 765 previewPage 766 previewPage 767 previewPage 768 previewPage 769 previewPage 770 previewPage 771 previewPage 772 previewPage 773 previewPage 774 previewPage 775 previewPage 776 previewPage 777 previewPage 778 previewPage 779 previewPage 780 previewPage 781 previewPage 782 previewPage 783 previewPage 784 previewPage 785 previewPage 786 previewPage 787 previewPage 788 previewPage 789 previewPage 790 previewPage 791 previewPage 792 previewPage 793 previewPage 794 previewPage 795 previewPage 796 previewPage 797 previewPage 798 previewPage 799 previewPage 800 previewPage 801 previewPage 802 previewPage 803 previewPage 804 previewPage 805 previewPage 806 previewPage 807 previewPage 808 previewPage 809 previewPage 810 previewPage 811 previewPage 812 previewPage 813 previewPage 814 previewPage 815 previewPage 816 previewPage 817 previewPage 818 previewPage 819 previewPage 820 previewPage 821 previewPage 822 previewPage 823 previewPage 824 previewPage 825 previewPage 826 previewPage 827 previewPage 828 previewPage 829 previewPage 830 previewPage 831 previewPage 832 previewPage 833 previewPage 834 previewPage 835 previewPage 836 previewPage 837 previewPage 838 previewPage 839 previewPage 840 previewPage 841 previewPage 842 previewPage 843 previewPage 844 previewPage 845 previewPage 846 previewPage 847 previewPage 848 previewPage 849 previewPage 850 previewPage 851 previewPage 852 previewPage 853 previewPage 854 previewPage 855 previewPage 856 previewPage 857 previewPage 858 previewPage 859 previewPage 860 previewPage 861 previewPage 862 previewPage 863 previewPage 864 previewPage 865 previewPage 866 previewPage 867 previewPage 868 previewPage 869 previewPage 870 previewPage 871 previewPage 872 previewPage 873 previewPage 874 previewPage 875 previewPage 876 previewPage 877 previewPage 878 previewPage 879 previewPage 880 previewPage 881 previewPage 882 previewPage 883 previewPage 884 previewPage 885 previewPage 886 previewPage 887 previewPage 888 previewPage 889 previewPage 890 previewPage 891 previewPage 892 preview
Contents
  1. Table Of Contents
  2. Table Of Contents
  3. Table Of Contents
  4. Table Of Contents
  5. Table Of Contents
  6. Table Of Contents
  7. Table Of Contents
  8. Table Of Contents
  9. Table Of Contents
  10. Table Of Contents
  11. Table Of Contents
  12. Table Of Contents
  13. Table Of Contents
  14. Table Of Contents
  15. Table Of Contents
  16. MB86R02 'Jade-D' Hardware Manual
  17. block diagram
  18. outline of each functional block
  19. Remap Boot Controller (RBC)
  20. function summary of the blocks
  21. package dimensions
  22. pin assignment
  23. pin assignment table
  24. pin functional description
  25. system configuration
  26. memory map of lsi
  27. register access
  28. cpu (arm926ej-s core)
  29. configuration of arm926ej-s and etm
  30. clock reset generator (crg)
  31. location in the device
  32. INITRAM control
  33. clock generation
  34. register list
  35. pll control register (crpr)
  36. watchdog timer control register (crwr)
  37. reset/standby control register (crsr)
  38. clock divider control register a (crda)
  39. clock divider control register b (crdb)
  40. ahb (a) bus clock gate control register (crha)
  41. apb (a) bus clock gate control register (crpa)
  42. reserved control register (crpb)
  43. ahb (b) bus clock gate control register (crhb)
  44. arm core clock gate control register (cram)
  45. clock selector control register (csel)
  46. spread spectrum clock generator (sscg)
  47. Software Interface
  48. Global Address
  49. Processing Mode
  50. Parameter setting for SSCG-speed of 20KHz
  51. Parameter setting for SSCG-speed of 35KHz
  52. Control Flow
  53. Overview
  54. Features
  55. Registers
  56. CHIP ID register (CCID)
  57. Soft reset register (CSRST)
  58. Interrupt status register (CIST)
  59. Interrupt status mask register (CISTM)
  60. GPIO interrupt status register (CGPIO_IST)
  61. GPIO interrupt polarity setting register (CGPIO_IP)
  62. AXI bus wait cycle set register (CAXI_BW)
  63. AXI priority setting register (CAXI_PS)
  64. Multiplex mode setting register (CMUX_MD)
  65. External pin status register (CEX_PIN_ST)
  66. MediaLB set register (CMLB)
  67. MBUS2AXU set register (CMBUS)
  68. Mode switch register like endian etc. (CBSC)
  69. DDR2 Interface reset control register (CDCRC)
  70. Soft reset register 0 for macro (CMSR0)
  71. Soft reset register 1 for macro (CMSR1)
  72. Soft reset register 2 for macro (CMSR2)
  73. initram control
  74. Interrupt Request Controller (IRC)
  75. interrupt map
  76. External Interrupt Controller (EXIRC)
  77. Block diagram
  78. Register
  79. External interrupt enable register (EIENB)
  80. External interrupt request register (EIREQ)
  81. External interrupt level register (EILVL)
  82. Operation
  83. External Bus Interface
  84. Related pin
  85. SRAM/Flash mode register 0/2/4 (MCFMODE0/2/4)
  86. SRAM/Flash timing register 0/2/4 (MCFTIM0/2/4)
  87. SRAM/Flash area register 0/2/4 (MCFAREA0/2/4)
  88. Memory controller error register (MCERR)
  89. Connection example
  90. Example of access waveform
  91. Low-speed device interface function
  92. Endian and byte lane to each access
  93. Embedded SRAM
  94. DDR2 Controller
  96. Supply Clock
  97. DRAM initialization control register (DRIC)
  98. DRAM initialization command register [1] (DRIC1)
  99. DRAM CTRL ADD register (DRCA)
  100. DRAM control mode register (DRCM)
  101. DRAM CTRL SET TIME1 Register (DRCST1)
  102. DRAM CTRL SET TIME2 register (DRCST2)
  103. DRAM CTRL REFRESH register (DRCR)
  104. DRAM CTRL FIFO register (DRCF)
  105. AXI setting register (DRASR)
  106. DRAM IF MACRO SETTING DLL register (DRIMSD)
  107. DRAM ODT SETTING register (DROS)
  108. IO buffer setting ODT1 (DRIBSODT1)
  109. IO buffer setting OCD (DRIBSOCD)
  110. IO buffer setting OCD2 (DRIBSOCD2)
  111. ODT auto bias adjust register (DROABA)
  112. ODT bias select register (DROBS)
  113. IO monitor register 1 (DRIMR1)
  114. IO monitor register 3 (DRIMR3)
  115. OCD impedance setting register 1 (DROISR1)
  116. DRAM Initialization Sequence
  117. DRAM Initialization Procedure
  118. SDRAM Initialization Procedure
  119. OCD Adjustment Procedure
  120. ODT Setting Procedure
  121. Timer (TIMER)
  122. DMA Controller (DMAC)
  124. Related pins
  125. Register list
  126. DMA configuration register (DMACR)
  127. DMA configuration A register (DMACAx)
  128. DMA configuration B register (DMACBx)
  129. DMAC source address register (DMACSAx)
  130. DMAC destination address register (DMACDAx)
  131. Transfer modes
  132. timing chart
  133. Limitations with I2S DMA
  134. Burst transfer
  135. Demand transfer
  136. Beat transfer
  137. Increment and lap transfer
  138. Channel priority control
  139. Rotate priority
  140. Retry, split, and error
  141. Error
  142. DMAC Configuration Examples
  143. DMA start in all channels (in demand transfer mode)
  144. Host Interface
  145. Function
  146. Read Access
  147. Interrupt
  148. External Interfaces
  149. Data Formats
  150. Application Notes
  151. Handling of irregular operating conditions
  152. APIX® Interface
  153. Jade-D Restrictions
  155. Format of Register Description
  156. Register Summary
  157. Register Description
  158. Description of APIX Ashell and APIX PHY configuration bytes
  159. GPIO Interface Timing of Sideband Uplink and Downlink
  161. Use cases
  162. Use case 2
  163. Application Notes for PCB Designers
  164. Graphics Display Controller (GDC)
  165. Functional Overview
  166. Video capture function
  167. D Drawing
  169. Special effects
  170. Others
  171. Graphics Memory
  172. Configuration
  173. Data Format
  174. Frame Management
  175. Display Controller
  176. Display Function
  177. Overlay
  178. Display parameters
  179. Display position control
  180. Display Color
  181. YCbCr Color (16 bits/pixel)
  182. Cursor
  183. Interlace display
  184. Programmable YCbCr/RGB conversion for L1-layer display
  185. DCLKO shift
  186. Parallel Dual Display
  187. Multiplex Dual Display
  188. Output Signal Control
  189. Display Clock and Timing
  190. Video output limitation
  191. Video Capture
  192. Input Port Selection
  193. Video Buffer
  194. Synchronization Control
  195. Interlaced Display
  196. Scaling
  197. Flow of image processing
  198. External video signal input conditions
  199. RGB input format
  200. Input Operation
  201. Conversion Operation
  202. Display Controller / Video Capture Register Summary
  203. Video capture registers
  204. Explanation of Local Memory Registers
  205. Common control register
  206. Display control register
  208. Timing Diagrams
  209. Interlace video mode
  210. Composite synchronous signal
  211. Geometry Engine
  212. Model-view-projection (MVP) transformation
  213. View port transformation (NDC→DC coordinate transformation)
  214. Back face culling
  216. Setup processing
  217. Drawing Processing
  218. Texture coordinates
  219. Figure Drawing
  220. Drawing parameters
  221. Anti-aliasing function
  222. Bit Map Processing
  223. Texture Mapping
  224. Texture Wrapping
  225. Filtering
  226. Texture blending
  227. Rendering
  228. Logic operation
  229. Drawing Attributes
  230. Texture attributes
  231. BLT attributes
  232. Broken line pattern
  233. Edging
  234. Interpolation of bold line joint
  235. Shadowing
  236. Header format
  237. Geometry Commands
  238. Explanation of geometry commands
  239. Rendering Commands
  240. Details of rendering commands
  241. Drawing Engine / Geometry Engine Register summary
  242. Geometry Engine register list
  243. Drawing control registers
  244. Drawing mode registers
  245. Triangle drawing registers
  246. Line drawing registers
  247. Pixel drawing registers
  248. Blt registers
  249. High-speed 2D line drawing registers
  250. High-speed 2D triangle drawing registers
  251. Geometry control register
  252. Geometry mode registers
  253. Display list FIFO registers
  254. Display List DMA contol registers
  255. Interrupt registers
  256. Color Lookup Table (CLUT)
  258. Limitations
  259. Dither Unit
  260. Position
  261. Timing chart
  263. Initialization procedure
  264. Signature Generator (SIG)
  265. Signature A: CRC-32 Signature
  269. Processing Flow
  270. Example Control Flow
  271. Signature Generation with every incoming frame
  272. Cyclic Signature Generation with every incoming frame, limiting read accesses
  273. Timing Controller (TCON)
  275. Processing Algorithm
  276. SW Reset
  277. Timing Signal Module (TSIG)
  278. Inversion Signal Generation
  279. Bypass-Mode
  280. AC Characteristics
  282. Application Note
  284. Run-Length Decompression (RLD)
  285. Feature List
  286. Input Data Format
  287. Output Data Format
  290. Processing Modes
  291. AHBMTransferWidth Setup
  292. General-Purpose Input/Output Port (GPIO)
  295. Port data register 0-2 (GPDR0-2)
  296. Data direction register 0-2 (GPDDR0-2)
  297. Direction control
  298. Pulse Width Modulator (PWM)
  299. Clock Supply
  301. PWMx base clock register (PWMxBCR)
  302. PWMx pulse width register (PWMxTPR)
  303. PWMx phase register (PWMxPR)
  304. PWMx duty register (PWMxDR)
  305. PWMx status register (PWMxCR)
  306. PWMx start register (PWMxSR)
  307. PWMx current count register (PWMxCCR)
  308. PWMx interrupt register (PWMxIR)
  309. Example of setting a register
  310. A/D Converter
  312. Channel mapping table
  313. Analog pin equivalent circuit
  315. Format of Register Descriptions
  316. ADCx data register (ADCxDATA)
  317. ADCx clock selection register (ADCxCKSEL)
  318. ADCx status register (ADCxSTATUS)
  319. Basic operation flow
  320. Serial Audio Interface (I2S)
  324. Description format of registers
  325. I2SxRXFDAT register
  326. I2SxTXFDAT register
  327. I2SxCNTREG register
  328. I2SxMCR0REG register
  329. I2SxMCR1REG register
  330. I2SxMCR2REG register
  331. I2SxOPRREG register
  332. I2SxSRST register
  333. I2SxINTCNT register
  334. I2SxSTATUS register
  335. I2SxDMAACT register
  336. Outline
  337. Transfer start, stop, and malfunction
  338. Frame construction
  339. sub frame construction
  340. Bit alignment
  341. FIFO construction and description
  342. UART Interface
  345. Reception FIFO register (URTxRFR)
  346. Interrupt enable register (URTxIER)
  347. Interrupt ID register (URTxIIR)
  348. FIFO control register (URTxFCR)
  349. Line control register (URTxLCR)
  350. Modem control register (URTxMCR)
  351. Line status register (URTxLSR)
  352. Modem status register (URTxMSR)
  353. Divider latch register (URTxDLL&URTxDLM)
  354. UART operation
  355. Example of transfer procedure
  356. Example of reception procedure
  357. Basic transmission operation
  358. Basic reception operation
  359. Line status
  360. Character time-out interrupt
  361. I2C Bus Interface
  363. Block functions
  366. Bus status register (I2CxBSR)
  367. Bus control register (I2CxBCR)
  368. Clock control register (I2CxCCR)
  369. Address register (I2CxADR)
  370. Data register (I2CxDAR)
  371. Two bus control registers (I2CxBC2R)
  372. Expansion CS register (I2CxECSR)
  373. Bus clock frequency register (I2CxBCFR)
  374. Start condition
  375. Stop condition
  376. Addressing
  377. Synchronous arbitration of SCL
  378. Arbitration
  379. Acknowledge/Negative acknowledge
  380. Bus error
  381. Initialization
  382. One byte transfer from master to slave
  383. One byte transfer from slave to master
  384. Resume from bus error
  385. Interrupt process and wait request operation to master
  386. Serial Peripheral Interface (SPI)
  388. Transition state
  390. SPI control register (SPInCR)
  391. SPI slave control register (SPInSCR)
  392. SPI data register (SPInDR)
  393. SPI status register (SPInSR)
  394. Setup procedure flow
  395. CAN Interface (CAN)
  397. MediaLB Interface
  399. SD Memory Controller (SDMC)
  400. Electrical Characteristics
  401. Recommended Operating Conditions
  402. Precautions at Power On
  403. Power On Reset
  404. DC Characteristics
  405. V Standard CMOS I/O V-I Characteristic (Driving Capability 1)
  406. V Standard CMOS I/O V-I Characteristic (Driving Capability 2)
  407. V Standard CMOS I/O V-I Characteristics (Driving Capability 3)
  408. DDR2SDRAM IF I/O (SSTL_18)
  409. I2C Bus Fast Mode I/O
  410. I2C IO V-1 Characteristic Figure
  411. Memory Controller Signal Timing
  412. DDR2SDRAM Interface
  413. DDR2SDRAM Interface Timing Diagram
  414. GPIO Signal Timing
  415. PWM Signal Timing
  416. GDC Display Signal Timing
  417. Output Signal
  418. TCON active Display Timing DISP0 Interface
  419. RSDS Characteristics
  420. I2S Signal Timing
  421. UART Signal Timing
  422. I2C Bus Timing
  423. SPI Signal Timing
  424. CAN Signal Timing
  425. MediaLB Signal Timing
  426. MediaLB AC Spec Type B
  427. SD Signal Timing
  428. ETM9 Trace Port Signal Timing
  429. EXIRC Signal Timing
  430. Apix Characteristics
  431. Transmitter De-emphasis
  432. OSC Characteristics
  433. Multiplex (1)
  434. PU/PD added
  435. SSCG (Spread-Spectrum Modulation)
Fujitsu MB86R02 Jade-D Hardware Manual Manual pdf 834 page image
30-13MB86R02 ‘Jade-D’ Hardware Manual V1.6430.7 Setup procedure flowFigure 30-8 shows SPI setup procedure flow.STARTSTATE = SLEEPYesNoSTARTSTATE = SLEEPSTATE =ERROR ?Write SPISCR(SPE set/clear)Write SPICRSTATE =SETUP ?DATAcommunicationNoYesYesNoSTATE =BUSY ?Read SPISR(SIRQ clear)Write SPIDR(TxRx start)STATE =SETUP ?NoYesDATACommunicationstartDeletereceived data?Read SPIDRContinue datacommunication withoutsetting change?DATAcommunicationendYesNoYesNoFigure 30-8 SPI setup flow chart
/ 892
Related manuals for Fujitsu MB86R02
Fujitsu SK-86R03-VIDEO User Manual first page preview
Fujitsu SK-86R03-VIDEO User Manual
Fujitsu 7119601 User Manual first page preview
Fujitsu 7119601 User Manual
Fujitsu MVGA-NVG11A User Manual first page preview
Fujitsu MVGA-NVG11A User Manual
This manual is suitable for:
MB86R02
Product
Menu
Learn More
Menu
Legal
Menu
Copyright © 2024 OneStart. All Rights Reserved