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PPC11A
abaco systems PPC11A Hardware Reference Manual
abaco systems PPC11A Hardware Reference Manual
Table of content
Contents
document history
about this manual
Table Of Contents
Table Of Contents
Table Of Contents
Table Of Contents
Table Of Contents
Table Of Contents
Table Of Contents
Table Of Contents
Table Of Contents
Table Of Contents
Unpacking
Figure 1-3 Product Label (Conduction-cooled Product)
Configuration
Inspection
NVRAM Write Enable Link (P15 Pins 5 and 6)
PMC1 & PMC2 5V VIO Selection Links (P15 Pins 13 to 16)
Mezzanine Installation
Installation and Power Up/Reset
Connecting to PPC11A
Functional Description
Figure 4-2 Block Diagram (T2081)
Figure 4-3 Block Diagram (T1042)
Features
Integrated Host Processor
Memory Map
Local Bus
SDRAM
Boot Flash
SPI Serial Recovery Flash
VME Interface
VMEbus Master Access
VMEbus Master Block Transfers (DMA)
VMEbus Retries
Ethernet
Serial Communication Ports
COM3 to COM6
Host-to-BMM Serial Port
SATA
Table 4-16 GPIO Line Routing
MIL-STD-1553
Graphics
Mezzanines
XMCs
Table 4-20 PMC/XMC Site 1 Signal Availability
PMC/XMC Site 2 Configuration
PCIe Infrastructure
PCIe Switches
Main Bus
Sensor and Backplane Buses
Processor Config EEPROM
DIP Switches
Real-Time Clock
Timers
AXIS Timer
Resets and Interrupts
External Interrupt
FPGA
JTAG
LEDs
DS10 and DS43 to DS45 (BIT)
DS3 and DS4 (ETH0 Status)
Air-cooled Front Panel (Build Levels 1 to 3)
Control and Status Registers
Board ID Register (Offset 0x600)
Slave FPGA Revision Register (Offset 0x60B)
Reset Cause Register 2 (Offset 0x61C)
LED Control Register 1 (Offset 0x622)
PCIe SATA SPI Control Register (Offset 0x626)
NOR Flash Page Register (Offset 0x636)
AXIS Clock Control Register (Offset 0x64F)
Timer Data Byte Registers
GPIO (7-0) Registers
GPIO (7-0) Interrupt Both Edges Register (Offset 0x676)
GPIO (7-0) Test Mode Register (Offset 0x67B)
GPIO (15-8) Interrupt Polarity Register (Offset 0x681)
GPIO (15-8) Test Mode Register (Offset 0x687)
GPIO (23-16) Interrupt Enable Register (Offset 0x68B)
GPIO (23-16) Availability Register (Offset 0x690)
Availability Registers
COM Port 4-Wire Configuration Register (Offset 0x6A2)
USB2.0 Ports 7–0 Availability Register (Offset 0x6A5)
VGA Availability Register (Offset 0x6AA)
Front Panel Configuration Register (Offset 0x6AE)
SSD Availability Register (Offset 0x6B1)
COM Port Mode Register (Offset 0x6BC)
SSD Erase Control Register (Offset 0x6BF)
Test Register (Offset 0x6C7)
XMC/PMC Site 1 Status Register (Offset 0x6C8)
XMC/PMC Site 2 Status Register (Offset 0x6C9)
SSD Status Register (Offset 0x6CB)
Jumper Link Status Register (Offset 0x6CD)
Boot Location Status Register (Offset 0x6CE)
Alarm Status Register (Offset 0x6D1)
Interrupt Status Register (Low) (Offset 0x6E0)
Availability/Configuration Register (Offset 0x6E8)
EEPROM DIP Switch 1 Configuration Register 0 (Offset 0x6EA)
Configuration Unlock Password Register (Offset 0x6EC)
Flash Password Registers (Offsets 0x6F0 to 0x6F7)
Watchdog Prescaler (Low Byte) Register (Offset 0x701)
Watchdog Kick Register (Offset 0x704)
Watchdog Minimum Threshold Low Byte Register (Offset 0x70A)
Scratchpad Memory Registers (Offset 0x720 to 0x72F)
Connectors
Figure 6-2 Rear Connector Position
Backplane Connectors
P1 Connector
P2 Connector
Backplane Signal Definitions
Figure 6-3 RS422/485 Signal Waveforms
PMC Connectors
J13/J23 Connector
J14/J24 Connector
PMC Signal Descriptions
XMC Connectors
J16 Connector
XMC Signal Descriptions
Test and Programming Headers
A • Specifications
A.2 Electrical Specification
A.3 Reliability (MTBF)
A.5 Product Codes
A.6 Software Support
A.6.3 Background Condition Screening
B • Statement of Volatility
C • PPCx Compatibility
C.1.2 P1 Connector
C.1.3 P2 Connector
C.1.4 P2 Connector Alternative
C.2 PPC7A
C.2.2 P1 Connector
C.2.3 P2 Connector
C.2.1 P2 Connector Alternative
C.3 PPC7D
C.3.2 P0 Connector Alternative
C.3.3 P1 Connector
C.3.4 P2 Connector
C.3.1 P2 Connector Alternative
C.4 PPC10A
C.4.1 P0 Connector Alternative
C.4.2 P1 Connector
C.4.3 P2 Connector
C.4.1 P2 Connector Alternative 1
C.4.1 P2 Connector Alternative 2
Glossary
Index
Hardware Reference Manual
PPC11A 6U VME Single Board Computer
Edition 1
Publication No. PPC11A-HRM/1
Next
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This manual is suitable for:
PPC11A
