Xilinx ML605 User Manual

Also see for Virtex-6 FPGA: User guide Guide Hardware setup guide User guide User guide

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Xilinx ML605 User Manual Manual pdf 44 page image

44 www.xilinx.com ML605 Hardware User GuideUG534 (v1.2.1) January 21, 2010Chapter 1: ML605 Evaluation Board8 Kb NV MemoryThe ML605 hosts an 8 Kb ST Microelectronics M24C08-WDW6TP IIC parameter storagememory device (U6). The IIC address of U7 is 0b1010100, and U6 is not write protected(WP pin 7 is tied to GND).The IIC memory is shown in Figure 1-15.ReferencesSee the ST Micro M24C08 Data Sheet for more information. [Ref 31]In addition, see the Xilinx XPS IIC Bus Interface (v2.00a) Data Sheet. [Ref 21]X-Ref Target - Figure 1-15Figure 1-15: IIC Memory U6UG534_15_072109IIC SCL MAINVCC3V3VCC3V3 VCC3V3IIC Address = 0b1010100IIC SDA MAINU6SCLWP C65X5R10V0.1UFVCCGNDSDAA0A1A267845112M24C08-WDW6TP23R305DNP1%1/16WR41305%1/16WR41405%1/16W11211220 5%2 R414Table 1-18: IIC Memory ConnectionsFPGA U1 Pin Schematic Net Name IIC Memory U6Pin Number Pin NameNot Applicable Tied to GND 1 A0Not Applicable Tied to GND 2 A1Not Applicable Pulled up (0 ohm) to VCC3V3 3 A2N10 IIC_SDA_MAIN 5 SDAP11 IIC_SCL_MAIN 6 SCLNot Applicable Tied to GND 7 WP