Sony BCU-100 Maintenance Manual

Also see for BCU-100: Installation manual

BCU-100 MM 1-15 (E). BE_RC_REFCLK : 500 MHz. RSX_RC_REFCLK : 500 MHz. SB_RC_REFCLK : 500 MHz(4) XCG3 for XDR MemoryICS9218 (IC5012) : Generates the following clockfrom the 100 MHz Master Clock Generator.. BE_Y0_RQ_CTM : 400 MHz. BE_Y1_RQ_CTM : 400 MHz(5) Power supply supplied to the clock systemThe following are the required power supplies for theclock circuit.. V3P3_MK_VDD : IC7502. V2P5_LREG_XCG_500 : IC7503. V2P5_LREG_XCG_500_MEM : IC75046. FANUsing the thermal diode in the Cell/B.E. or RSX chip orthe thermal sensor positioned on the BE board, the temper-ature in the set is sensed and the SYSCON controls areused to control the fan to three rotation speeds in order tomanage the internal temperature of the set. The fan is aPWM control fan, so the chip controlling each fan releasesa signal according to controls from the SYSCON, and thePWM signal corresponding to that control is input intoeach fan. The fan rotates at the rotation speed that corre-sponds to the PWM signal. The fan is 40 mm square andhas a maximum rotation speed of 14,000 rpm. By usingthis small size, large air volume fan, the temperature canbe controlled easily.(1) Cell/B.E. temperature managementThe temperature sensing IC (IC6133) uses the thermaldiode in the Cell/B.E. to sense the temperature insidethe chip and simultaneously senses temperature dataaround the sensing IC. The temperature is managed onthe Cell/B.E. from SYSCON controls based on thisdata.(2) RSX temperature managementThe temperature sensing IC (IC6134) uses the thermaldiode in the RSX to sense the temperature inside theRSX and simultaneously senses temperature dataaround the sensing IC. The temperature is managed onthe RSX from SYSCON controls based on this data.(3) Memory extension adapter (BKCU-EX1) temperaturemanagementA temperature sensor is also placed on the MEM-122/MEM-126 board. The temperature is controlled byreading this data as the status of the memory extensionadapter.8) EEPROMTwo 256 Kbit EEPROM (IC6587-8) are mounted.The SYSCON log, error history, and other data isrecorded here.4. Reset circuitThe voltage monitoring chip (IC6008) monitors the voltageof V3P3_MAIN that acts as the power supply for theSYSCON circuit. The reset signal generated by this chipperforms hard reset on the SYSCON (IC6005). Thismechanism initializes predetermined areas over the entireSYSCON.The hardware reset switch (SW6001) is located on the BEboard. Pressing this switch performs reset on the entiresystem, but this method is normally not used. When thisswitch is pressed, all of the power supplies supplied toeach device are switched off all at once instead of switch-ing off in order. This can cause massive damage to thedevice, particularly if it occurs during operations. On theother hand, the reset switch on the front panel is a softwarereset for SYSCON and can be sued when the unit falls intoa critical state such as hang-up. The SYSCON (IC6005) isnotified through the IO port that the switch has beenpressed and applies reset to the entire system (see the resetsystem diagram).5. Clock circuitThe main clock system is based on the crystal oscillatingcircuit (14.31818 MHz) of the master clock generator(IC5601) and it generates the required clock with threePLL chips and chip built-in PLL. A local crystal oscillatoror oscillating circuit may also be included on each type ofchip (see the clock system diagram).(1) Master Clock GeneratorICS1493 (IC5601) : Generates the following clockfrom the original oscillations from the 14.31818 MHzcrystal oscillating circuit.. RSX_PLL_REFCLK : 100 MHz. SB_PEX0_REFCLK : 100 MHz. SB_PEX_REFCLK : 100 MHz. SB_PCI_CLK : 33 MHz. SB_SYSCLK : 66 MHz. MK_ATA_CLK : 133 MHz(2) XCG0 for BE coreICS9218 (IC5010) : Generates the following clockfrom the 100 MHz Master Clock Generator.. BE_PLL_REF_CLK : 400 MHz(3) XCG2 for IOIFICS9214 (IC5003) : Generates the following clockfrom the 100 MHz Master Clock Generator.