Chapter 3 Signal Connections© National Instruments Corporation 3-13 NI 660x User ManualYou can export the CtrnGate signal to the I/O connector’s default PFI inputfor each CtrnGate. For example, you can export the gate signal connectedto counter 0 to the PFI 38/CTR 0 GATE pin, even if another PFI is inputtingthe Ctr0Gate signal. This output is set to high-impedance at startup.Figure 3-6 shows the timing requirements for the CtrnGate signal.Figure 3-6. Timing Requirements for CtrnGate SignalTable 3-6 shows the minimum pulse width required for the internal signals.Note For buffered measurements, the minimum period required for the CtrnGate signal isdetermined by how fast the system can transfer data from your device to computer memory.Counter n Auxiliary SignalYou can select any PFI or RTSI, as well as many other internal signals asthe Counter n Auxiliary (CtrnAux) signal. Much like this CtrnGate signal,the CtrnAux signal is configured in edge-detection or level-detection modedepending on the application performed by the counter. The aux signal canperform many different operations including starting and stopping thecounter, generating interrupts, and saving the counter contents. You canalso use this signal to control the counting direction in edge-countingapplications.Table 3-6. Minimum Pulse Width for CtrnGate Internal SignalsParameter MinimumMinimum withRTSI Connector DescriptionTgatepw 5 ns 5 ns CtrnGate minimum pulse widthCtrnGateTgatepwTgatepw