Chapter 3 Signal ConnectionsNI 660x User Manual 3-12 ni.comCounter Source to Counter Out DelayFigure 3-5 shows the CtrnSource to CtrnInternalOutput delay.Figure 3-5. CtrnSource to CtrnInternalOutput DelayFigure 3-5 shows the delay between the active edge of the CtrnSourcesignal and the active edge of the CtrnInternalOutput signal. In the figure,the CtrnSource and CtrnInternalOutput signals are active high. If you usethe pulse output mode for the CtrnInternalOutput signal, you will see theTC pulse one CtrnSource period before the CtrnInternalOutput togglesunder the toggle output mode.The output delay listed in Table 3-5 is for internal signals. Thecorresponding delay values at a connector block are larger due to cabledelays.Note When using duplicate count prevention mode, the minimum period of signal used asthe source of the counter must be greater than or equal to four times the period of themaximum timebase. For more information, refer to the Duplicate Count Prevention sectionof this document.Counter n Gate SignalYou can select any PFI or RTSI, as well as many other internal signals likethe Counter n Gate (CtrnGate) signal. The CtrnGate signal is configured inedge-detection or level-detection mode depending on the applicationperformed by the counter. The gate signal can perform many differentoperations including starting and stopping the counter, generatinginterrupts, and saving the counter contents.Table 3-5. Output Delay for Internal SignalsParameter Typical Maximum DescriptionTso 16 ns 26 ns CtrnSource to CtrnInternalOutput delayCtrnInternalOutputTso TsoCtrnSource