CHAPTER 5: SETTINGS FLEXLOGICD30 LINE DISTANCE PROTECTION SYSTEM – INSTRUCTION MANUAL 5-17755.6.2 FlexLogic rulesWhen forming a FlexLogic equation, the sequence in the linear array of parameters must follow these general rules:1. Operands must precede the operator that uses the operands as inputs.2. Operators have only one output. The output of an operator must be used to create a virtual output if it is to be used asan input to two or more operators.3. Assigning the output of an operator to a virtual output terminates the equation.4. A timer operator (for example, "TIMER 1") or virtual output assignment (for example, " = Virt Op 1") can be used onceonly. If this rule is broken, a syntax error is declared.5.6.3 FlexLogic evaluationEach equation is evaluated in the ascending order in which the parameters have been entered.This section provides an example of logic implementation for a typical application. The sequence of steps is important tominimize the work to develop the relay settings. Note that the example in the following figure demonstrates the procedure,not to solve a specific application situation.Note that there is also a graphical interface with which to draw logic and populate FlexLogic equation entries. See theEngineer content at the end of the previous chapter.In the example, it is assumed that logic has already been programmed to produce virtual outputs 1 and 2, and is only apart of the full set of equations used. When using FlexLogic, it is important to make a note of each virtual output used; avirtual output designation (1 to 96) can be assigned only once.Figure 5-86: Logic example1. Inspect the example logic diagram to determine if the required logic can be implemented with the FlexLogicoperators. If this is not possible, the logic must be altered until this condition is satisfied. Once done, count the inputsto each gate to verify that the number of inputs does not exceed the FlexLogic limits, which is unlikely but possible. Ifthe number of inputs is too high, subdivide the inputs into multiple gates to produce an equivalent. For example, if 25inputs to an AND gate are required, connect Inputs 1 through 16 to AND(16), 17 through 25 to AND(9), and the outputsFlexLogic provides built-in latches that by definition have a memory action, remaining in the set state after the setinput has been asserted. These built-in latches are reset dominant, meaning that if logical "1" is applied to both setand reset entries simultaneously, then the output of the latch is logical "0." However, they are volatile, meaning thatthey reset upon removal of control power.When making changes to FlexLogic entries in the settings, all FlexLogic equations are re-compiled whenever anynew FlexLogic entry value is entered, and as a result of the re-compile all latches are reset automatically.To implement FlexLogic using a graphical user interface, see the FlexLogic Design and Monitoring using Engineersection in the previous chapter.
