PCI-1736UP User Manual 40C.6 Interrupt Status Register ó BASE+8H/CH/10HThe PCI-1736UP Interrupt Status Register control the status of twointerrupt signal sources (IDI0, IDI1).IDInF Interrupt flag bits (n = 0 ~ 1)This bit is a flag indicating the status of an interrupt. User can read this bitto get the status of the interrupt0 No interrupt1 Interrupt occurredIDInEN Interrupt enable control bits (n = 0 ~ 1)Read this bit to Enable/Disable the interrupt.0 Disable1 EnableIDInRF Interrupt triggering control bits (n = 0 ~ 1)The interrupt can be triggered by a rising edge or falling edge of the inter-rupt signal, as determined by the value in this bit.0 Rising edge trigger1 Falling edge triggerTable C.5: Register for Interrupt StatusRead Interrupt Status RegisterBit # 7 6 5 4 3 2 1 0BASE + 8H IDI1EN IDI0ENBASE + CH IDI1RF IDI0RFBASE + 10H IDI1F IDI0F