101 AIMB-782 User ManualAppendix B I/O Pin AssignmentsB.24 System I/O PortsB.25 DMA Channel AssignmentsB.26 Interrupt AssignmentsI/O Address (Hex) Device290h-29Fh H/W Monitor2F8h-2FFh Communication Port (COM2)378h-37Fh ECP Printer Port (LPT1)3B0h-3BBh Graphics3C0h-3DFh Graphics3F8h-3FFh Communication Port (COM1)400h-47Fh PMBASE500h-57Fh GPIOBASE778h-77Fh ECP Printer Port (LPT1)C80h-C9Fh Communication Port (COM3~6)Table B.23: DMA channel assignmentsChannel Function0 Available1 Available2 Available3 Available4 Cascade for DMA controller 15 Available6 Available7 AvailableTable B.24: Interrupt assignmentsPriority Interrupt# Interrupt source1 NMI Parity error detected2 IRQ0 System timer3 IRQ1 Keyboard- IRQ2 Interrupt from controller 2 (cascade)4 IRQ8 Real-time clock5 IRQ9 SCI IRQ6 IRQ10 Available7 IRQ11 COM3 ~ 68 IRQ12 PS/2 mouse9 IRQ13 Numeric data processor10 IRQ14 Available11 IRQ15 Available12 IRQ3 Communication port (COM2)13 IRQ4 Communication port (COM1)14 IRQ5 Available
