Ublox LISA-U1 Series System Integration Manual

Also see for LISA-U100: Integration manual

Contents

Ublox LISA-U1 Series System Integration Manual Manual pdf 111 page image

LISA-U1 series - System Integration Manual3G.G2-HW-10002-3 Preliminary Design-InPage 111 of 125If the device implements an external antenna and the antenna or its connecting cable are not provided withcompletely insulating enclosure to avoid air discharge up to +8 kV / -8 kV to the whole antenna and cablesurfaces, the following precautions to ESD immunity test should be implemented on the application boardA higher protection level is required at the ANT port if the line is externally accessible on the application board.ESD immunity test requires protection up to +4 kV / -4 kV for direct Contact Discharge and up to +8 kV / -8 kVfor Air Discharge applied to the antenna port.2.5.3 Module interfaces precautionsAll the module pins that are externally accessible should be included in the ESD immunity test since they areconsidered to be a port [11]. Depending on applicability, and in order to satisfy ESD immunity test requirementsand ESD category level, pins connected to the port should be protected up to +4 kV / -4 kV for direct ContactDischarge, and up to +8 kV / -8 kV for Air Discharge applied to the enclosure surface.The maximum ESD sensitivity rating of all the pins of the module, except the ANT pin, is 1 kV (Human BodyModel according to JESD22-A114F). A higher protection level can be achieved by mounting an ESD protection(e.g. EPCOS CA05P4S14THSG varistor array or CT0402S14AHSG).For the USB interface a very low capacitance (i.e. less or equal to 1 pF) ESD protection (e.g. Tyco ElectronicsPESD0402-140 ESD protection device) can be mounted on the lines connected to USB_D+ and USB_D- pins.For the SIM interface a low capacitance (i.e. less than 10 pF) ESD protection (e.g. Infineon ESD8V0L2B-03L orAVX USB0002) must be placed near the SIM card holder on each line (VSIM, SIM_IO, SIM_CLK, SIM_RST).For the SPI interface a low capacitance (i.e. less than 10 pF) ESD protection (e.g. EPCOS CA05P4S14THSGvaristor array) can be mounted on the lines connected to SPI_MISO, SPI_MOSI, SPI_SCLK, SPI_MRDY andSPI_SRDY pins.