TXZ+ FamilyTMPM3H Group(1)Clock Control and Operation Mode2022-05-10Rev. 1.326 / 721.3.2. Mode State TransitionFigure 1.2 Mode State TransitionNote1: Warm up is required at returning. A warm up time must be set in the previous mode (NORMAL mode)before entering to STOP1 mode.Note2: When the CPU returns from STOP2 mode, the CPU branches to the interrupt service routine triggeredby reset. When the CPU returns from STOP1 mode, the CPU branches to the interrupt service routinetriggered by interrupt events.1.3.2.1. IDLE mode transition flowSet up the following procedure at switching to IDLE mode.Because IDLE mode is released by an interrupt, set the interrupt before switching to IDLE mode. For theinterrupts that can be used to release the IDLE mode, refer to "1.3.3.1. The release source of a Low PowerConsumption mode". Disables unused interrupts and unavailable interrupts for release IDLE mode.Switching procedure (from NORMAL mode)1 [SIWDxEN]E> = 0 Disable SIWDT2 [SIWDxCR]= 0xB1 Disable SIWDT.3 [FCSR0] is read It waits until Flash will be in a Ready state (= 1).4 [CGSTBYCR]> = 00 Low Power Consumption mode selection is set to IDLE.5 [CGSTBYCR] is read Confirm "00" to written to the register at the step 4.6 WFI command execution Switch to IDLE.ResetNORMAL ModeIDLE Mode(CPU stops)(Operating peripheralfunction can be selected)After reset,the high-speedoscillator1(IHOSC1)oscillates.InterruptSTOP1 Mode(CPU stops exceptsome peripheralfunctions)InterruptInstructionInstruction(Note1)(Note2)STOP2 Mode(CPU stops with shutdowninternal power supplyexcept some peripheralfunctionsInterruptInstructionReset(The backup domain)(Note2)