Toshiba TLCS-900/L1 Series Manual

TMP91C82491C824-206 2008-02-20(10) PAGE register setting (for PAGE0/1)7 6 5 4 3 2 1 0Bit symbol INTENA ADJUST ENATMR ENAALM PAGEPAGER(0327H) Read/Write R/W W R/W R/WAfter reset 0 Undefined Undefined UndefinedRead-modifywriteinstructionareprohibitedFunction INTRTC0: Disable1: Enable “0” is read.0:Don’t care1:AdjustClock0: Disable1: EnableALARM0: Disable1: Enable“0” is read. PAGEselectionNote: Pleas keep the setting order below and don’t set same time.(Set difference time to Clock/Alarm setting and interrupt setting)(Example) Clock setting/Alarm settingld (pager), 0ch : Clock, Alarm enableld (pager), 8ch : Interrupt enable0 Select Page0PAGE 1 Select Page10 Don’t careADJUST1 Adjust sec. counter.When set this bit to “1” the sec. counter become to“0” when the value of sec. counter is 0 – 29. And incase that value of sec. counter is 30-59, min.counter is carried and become sec. counter to "0".Output Adjust signal during 1 cycle of f SYS . Afterbeing adjusted once, Adjust is releasedautomatically.(PAGE0 only)(11) Reset register setting (for PAGE0/1)7 6 5 4 3 2 1 0Bit symbol DIS1Hz DIS16Hz RSTTMR RSTALM RE3 RE2 RE1 RE0RESTR(1328H) Read/Write WAfter reset UndefinedRead-modifywriteinstructionareprohibitedFunction 1Hz0: Enable1: Disable16Hz0: Enable1: Disable1: Clockreset1:Alarm reset Always write “0”0 UnusedRSTALM 1 Reset alarm registerNote: When write “1”, reset alarm during 1 cycle of f SYS. After that, reset is released automatically.0 UnusedRSTTMR 1 Reset dividerNote: When write “1”, reset alarm during 1 cycle of f SYS. After that, reset is released automatically. (PAGER) Source signal1 1 1 Alarm0 1 0 1Hz1 0 0 16HzOthers Output “0”