Sony HDV HVR-1500 Service Manual

Also see for HDV HVBK-1505: Service manual Installation instructions

5-99HVR-1500 5-9923451I J K L M N O PSDI-94 (7/8)SUFFIX: -11SDI-94 (7/8)SUFFIX: -11Digital Input/Output BoardSDI-94 (7/8)BOARD NO. 1-870-508-11BIX-167_SDI-94_11B_070.8 CL721CK74_OUT 0080.8 CL7170.8 CL7140.8 CL722DETECT_TRS008LOCKED008RS_RST0080.8 CL7200.8 CL719IOPROC_EN008SMPTE_BYPASS0080.8 CL716SDO_EN0080.8 CL7150.8 CL718DATA0 007DCLK 007CONF_DONE 007nCONFIG 007Y0 008Y1 008Y2 008Y3 008Y4 008Y5 008Y6 008Y7 008Y8 008Y9 008GNDC0 008C1 008C2 008C3 008C4 008C5 008C6 008C7 008C8 008C9 008F 008V 008H 008GND0.1uF#C73547#R7380#R72710k#R74247k#R73247k#RB716 12345678#TP70310k#R74047k#R7310#R72810k#R7410.1uF#C734#TP7020#R72447#R7340#R72347#RB7241 23 45 67 847#RB7211 23 45 67 847k#RB7191234567810k#R73947k#R73347#R73647#RB7221 23 45 67 847k#R73047k#RB7131234567847#R73547#RB7231 23 45 67 847k#R72947#RB7201 23 45 67 847k#RB715123456780#R72547k#RB71412345678FPGA_EPC_ASD 007FPGA_EPC_CS 007nCE 007CONF_DONE 007DCLK007GNDFPGA_EPC_CS0070#R7520#R74810k#R751nCE 0070#R746 NM0.1uF#C738DATA0 007nCONFIG 007FPGA_EPC_ASD007GNDGND0.1uF#C7390#R7470#R7490#R750C4.7uF#C729+3VTK11225CMCL-GIC706VIN6GND12VOUT 4NP 3CONT1GND25GND+3V +2.5VB22uFC7410.1uFC740GNDGNDC4.7uFC737+3V#CN7011 VCC/VCC2 DATA_OUT/nSTATUS3 ASDI/DATA04 CONF_DONE/CONF_DONE5 nCONFIG/nCONFIG6 DCLK/DCLK11GND12GND7 MODE(L)/(MODE)8 GND/GND9 nCE/(NC)10 nCS/(NC)0#R7200#R722 H_SHUT_DWN 008DVB_ASI 008BLANK 0080#R7190.8 CL713#CN7021VCC2TRST3TDI4TDO5TMS6TCK11GND12GND7MODE8GND9NC10NC+3VGNDGND10kRB72612345678TDO006TMS006TCK006EPCS4SI8N-T05#IC707ASDI5VCC2 7DATA 2DCLK6CS1GND4 VCC1 3VCC3 8#R726 0#:NOTE6.3V 10V 1/16W6.3V 10V 1/16WCN701 10P NMFB702 Mount NM10V IC705 EP1C6F256C NM 1/16WIC707 EPCS4SI8N- NM10V L701 6.8uH NM 1/16W10V 1/16W 010V 1/16W 0HD&SD SD HD&SD SD HD&SD SDC703 22uF NM C738 0.1uF NM R735 47 NMB B 0.5%C704 22uF NM C739 0.1uF NM R736 47 NMB B 0.5%C705 22uF NM CN104 60P NM R738 47 NM6.3V 1/16WB 0.5%10V 1/16W 0C706 22uF NM R739 10k NM6.3V 1/16WB CN702 10P NM 0.5%10V 0 1/16WC707 22uF NM R740 10k NM6.3V FB701 Mount NM 1/16WB 0.5%10V 0 1/16WC708 0.1uF NM R741 10k NMB 0.5%10V 0 1/16WC709 0.1uF NM R742 10k NMB 5% 0.5%C711 0.1uF NM R709 10 NM R747 0 NMB 0.5% ---C712 0.1uF NM R710 10 NM R748 0 NMB 0.5% ---10V 0C714 0.1uF NM R711 22k NM R749 0 NM10V 1/16W 0B 0.5% ---C715 0.1uF NM R712 10 NM R750 0 NM10V 1/16W 0B 0.5% ---C716 0.1uF NM R713 22k NM R751 10k NM10V 1/16W 1/16WB 0.5% 0.5%C717 0.1uF NM R715 10 NM R752 0 NMB 0.5% ---C718 0.1uF NM R717 0 NM R753 10 NMB --- 0.5%C720 0.1uF NM R719 0 NM R756 10 NMB --- 0.5%C722 0.1uF NM R720 0 NM R757 10 NMB --- 0.5%C723 0.1uF NM R722 0 NM RB701 47k NM10V 0B --- RB703 10 NMC724 0.1uF NM R723 0 NM RB704 10 NM10V 0B --- RB705 10 NMC726 0.1uF NM R724 0 NM RB706 10 NMB --- RB707 10 NMC727 0.1uF NM R725 0 NM RB708 10 NM10V 0B --- RB710 10 NMC728 0.1uF NM R726 0 NM RB711 10 NM10V 0B --- RB712 10 NMC729 4.7uF NM R727 0 NM RB713 47k NM6.3V 0C --- RB714 47k NMC730 0.1uF NM R728 0 NM RB715 47k NM10V 0B --- RB716 47k NMC731 0.1uF NM R729 47k NM RB719 47k NM10V 1/16WB 0.5% RB720 47 NMC732 0.1uF NM R730 47k NM RB721 47 NM10V 1/16WB 0.5% RB722 47 NMC733 0.1uF NM R731 47k NM RB723 47 NM10V 1/16WB 0.5% RB724 47 NMC734 0.1uF NM R732 47k NM TP702 Mount NM10V 1/16WB 0.5% TP703 Mount NMC735 0.1uF NM R733 47k NM10V 1/16WB 0.5%C736 0.1uF NM R734 47 NM10V 1/16WB 0.5%A_E3A_D2A_E1A_E14A_D15A_B2A_C2A_E16A_F16A_D3A_E2A_D1A_C15A_C3A_A2A_B1A_D16A_H2A_K4A_J13A_K13A_H3A_B11A_A11A_C12A_B12A_B13A_C14A_B15A_A9A_A8A_B7A_A6A_B5A_D10A_B10A_B14A_A13A_A15A_B9A_B8A_B6A_C7A_C10A_C5A_J16nCSOASDOnCEA_D4A_B16A_E15A_M14A_F1A_H14A_J15A_J14CONF_DONEDATA0INIT_DONETo/From Config ROMPull Down w/1kPull Up VCCIO(BANK3) w/10kDCLKConfigurationTDI Pull Up VCCIO(BANK3) w/10kPull Up 3.3V(EPC2) w/10k<-Pull Up 3.3V(EPC2) w/10kTMSFrom Config ROMnSTATUSTo/From Config ROMTCK<-Pull Up 3.3V(EPC2) w/10knCONFIGFrom Config ROM->From P/STo P/STo P/STo FPGAMSEL0 = GNDPULL UP 10k to 3.3VConnect FPGA J2 pinAngle typeFPGA_DCLK (2.5V IF)To FPGACONF_DONE (2.5V IF)Connect FPGA J1 pinMSEL1 = GNDnCE (2.5V IF)Connect FPGA K17 pinFPGA_nCSO (2.5V IF)FPGA_ASDO (2.5V IF) FPGA_DATA0 (2.5V IF)Connect FPGA L1 pinFrom FPGAnSTATUS (2.5V IF)Connect FPGA J7 pinAS MODE (20MHz:EPCS4)To FPGAConnect FPGA K6 pinALTERA_AS / ALTERA_PSnCONFIG (2.5V IF)Connect FPGA H2 pinEPR2SDI-94(W/HD)M'tDebug for Debug OnlySignal Tap JTAG I/F