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Sony CXD5602 User Manual
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CXD5602 User Manual－821/1010－Sequencer ClockStopTOPREG 0x071C [4] SCU_REQ 1'b0 PWD_SCU sequencer clock enable(CK_SCU_SEQ)CRG InterruptWait--- --- --- --- --- Waits for the clock enable completioninterrupt from the Clock ResetGenerator (CRG)InterruptConfirmationTOPREG 0x04F4 [21:0] STAT (&=22'h002000) != 0Interrupt confirmation: Confirms thatthe following bit turns to “1”[13]: CK_SCU_SEQ On/OffInterrupt Clear TOPREG 0x04EC [21:0] CLR |= 22'h002000 Sets the following bit to “1”RMW (OR)[13]: CK_SCU_SEQ On/OffReset Release TOPREG 0x0704 [7] XRST_SCU_ISOP1'b1Interrupt Mask TOPREG 0x04F0 [21:0] MSK &=22'h3FDFFFSets the following bit to “0”RMW (AND)[13]: CK_SCU_SEQ On/OffClock Supply TOPREG 0x071C [4] SCU_REQ 1'b1 PWD_SCU sequencer clock enable(CK_SCU_SEQ)CRG InterruptWait--- --- --- --- --- Waits for the clock enable completioninterrupt from the CRGInterruptConfirmationTOPREG 0x04F4 [21:0] STAT (&=22'h002000)!= 0Interrupt confirmation: confirms that thefollowing bit turns to “1”[13]: CK_SCU_SEQ On/OffInterrupt Clear TOPREG 0x04EC [21:0] CLR |= 22'h002000 Sets the following bit to “1”RMW (OR)[13]: CK_SCU_SEQ On/OffFIFO PartitionSettingSCU.FIFO_REG--- --- --- --- Refer to Table SCU (SensorControl Unit)-721, Table SCU(Sensor Control Unit)-722, TableSCU (Sensor Control Unit)-723,Table SCU (Sensor ControlUnit)-724SPI Initial Setting SCU.SPI --- --- --- --- Refer to the SPI (3.10) ChapterI2C0 InitialSettingsSCU.I2C0 --- --- --- --- Refer to the I2C (3.7) ChapterI2C1 InitialSettingsSCU.I2C1 --- --- --- --- Refer to the I2C (3.7) Chapter |
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