4-4 BKNW-116ICMC74HC4053F (MOTOROLA)TC74HC4053AF (TOSHIBA)TC74HC4053AF(EL)TC74HC4053AF-TP2000000001CONTROL INPUTS12132153X0X1Y0Y1Z0Z16ENXYZ14154VEE*7V EEC00001111xB00110011xY1 I/OY0 I/OZ1 I/OZ I/OZ0 I/OEN IN12345678161514131211109Y I/OX I/OX1 I/OX0 I/OA INB INC INGNDVDDV EE*OPENA11OPENB10OPENC9A01010101xSELECTEN ON CHANNELZ0Z0Z0Z0Z1Z1Z1Z1Y0Y0Y1Y1Y0Y0Y1Y1X0X1X0X1X0X1X0X1OPEN: VDD _ V EE = +3 V to +12 VVEE < GND01x: LOW LEVEL: HIGH LEVEL: DON’T CAREC-MOS TRIPLE 2-CHANNEL ANALOG MULTIPLEXER/DEMULTIPLEXER—TOP VIEW—S8081BF-S (SEIKO I&E)S8081BF-TFSETOUTRESET12348765VDDCRDISCHARGETRIGGERGNDC-MOS CR TIMER—TOP VIEW—76524CRDISCHARGETRIGGERSETRESETOUT 3OSCCRDISCHARGE76INPUTCHATTERINGKILLERTRIGGER 5INPUTCIRCUITSET 2INPUTCIRCUITRESET 4VOLTAGEREGULATOR20-STAGEDIVIDERTOUTSELECTFF20 CONTROLLOGICOUTPUTLEVELSHIFTEROUT3POWER-ONCLEARCIRCUITT OUTTRIGGER1) TRIGGER OPERATIONOUTRESETT OUTT OUTSET2) SET OPERATIONTOUT = TOSC x 219T OSC = 1.45 x RT x CTOUTRESETT OUTSC7S32F (MOTOROLA)CHIP PACKAGETC7S32F(TE85R)12GND 35 VDD4ABABY =21 4 YA0011B0101Y01110 : LOW LEVEL1 : HIGH LEVELY = A + B = A • BC-MOS 2-INPUT OR GATE—TOP VIEW—SN74HC00ANS (TI)SN74HC00ANS-E05ABABY = Y14 13VDDGND12 11 10 9 87654321A0011B0101Y11100 ; LOW LEVEL1 ; HIGH LEVELY = A • B = A + BC-MOS QUAD 2-INPUT NAND GATES—TOP VIEW—SN74HC03NS (TI)SN74HC03NS-E0514 13 12 11 10 9 81 2 3 4 5 6 7GNDAB Y AB Y=Y = A • B = A + BA0011B0101YHI-ZHI-ZHI-Z0V DDC-MOS QUAD 2-INPUT POSITIVE-NAND GATE WITH OPEN-DRAIN—TOP VIEW—* ** ** *01HI-Z: LOW LEVEL: HIGH LEVEL: HIGH IMPEDANCESN74HC132ANS (TI)SN74HC132ANS-E0514 13 12 11 10 9 81 2 3 4 5 6 7GNDAB Y AB Y=Y = A • B = A + BA0011B0101Y111001: LOW LEVEL: HIGH LEVELVDDC-MOS QUAD 2-INPUT NAND SCHMITT TRIGGER—TOP VIEW—