I/O Interrupt Controller 8259A8259A control interrupts. 8259A has eight levels ofinterrupt request pins. Interrupt requests arriving atthe respective pins are detected when the signal goeshigh or low.Pin VectorInterval timer (established to 10 msec inIRO 248(F8)period)Interval timer 1 (clock counter)249(F9)IR1USART Ready (RS232C)250(FA)IR2USART Rx Ready (keyboard)251(FB)IR3252(FC)IRiJ Printer Ready253CFD) Floppy disk controllerIR5IR6 25MFE) 8087 digital data processorUser interrupt (external bus IR7) (*1)*1 Negative logic255(FF)IR7The priorities of pins are fixed to the order of IRO(high) to IR7 (low).Operation Command Word (OCW) 1 changes the priorities.Of IRO to IR7, only IR1 to IR3 are associated withBIOS.Pins other than IR1 to IR3 are masked by the interruptmask register (MR) in 8259. The IMR can be read/written by performing Read/Write command on I/O address 02.5-17