21IC block diagram1. Zoran ZR39670Feature:Embedded High Performance 300MIPS CPUz Integrated MIPS 4KEc TM CPU, 300MHzz Intended to run RTOS, audio decode and Application softwarez 32-bit MIPS32 enhanced architecturez 8 K instruction cache, 8 K data cache, (2-way set associative)z MMU with 16-dual entry (TLB)Integrated HDMI Link and PHYz Two Independent instances of the PHYz Support for HDMI v1.3z Integrated Secure HDCP KeysIntegrated HD ADCz Three YPbPr inputs (Two SCART)(Up to 1080p)z One RGB input (Up to WUXGA)z Up to 165 MHz input bandwidthHigh-Performance MPEG-2 Video Decoding Enginez Support for a single MP@HL decoderIntegrated Dual Channel LVDS Output for direct Panel Display supportz Supports up to 165MHzz 1080p Output Flat Panel Supportz 100/120 Hz Operation with 768p panelsz 6, 8, 10 and 12-bit panel supportIntegrated NTSC/PAL/SECAM DecoderSCART Supportz Fast Blank/Fast switch inputsz Video DAC for CVBS outputDisplay Processor & Controllerz PIP operation with Digital/Analog PIPCommon Interface (CI)Integrated USB 1.1 InterfaceSystem Interfacesz Two 2-signal UARTsz Three I2C master or Slave interfaces (up to 400 kb/s)z One IR Receive, with hard N are demodulationz Guest bus interfacez SPI interfaceDevice Unique Chip IDz 128-bit device unique secret keyMemory Interface Unitz High performance 32-bit DDR2 interface (400MHz)z Up to 3.2GByte/second peak memory throughputProcess Technologyz 80 nm CMOSPowerz 1.1 V core voltage 1.8 V Memory I/F, 3.3 V I/OPackagingz 35 mm x 35 mm Plastic Ball Grid Array packagez 632 BGA