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PG-1810 Service ManualPANTECH R&D CONFIDENTIAL224.2.5 Offset PLL4.2.5.1 An Overview of Offset PLLFig.4-10. Si4210 Frequency Synthesizer Block DiagramThe Aero II transceiver integrates two complete PLLs including VCOs, varactors, resonators, loopfilters, reference and VCO dividers, and phase detectors. The RF PLL uses two multiplexed VCOs.The RF1 VCO is used for receive mode, and the RF2 VCO is used for transmit mode. The IF PLL isused only during transmit mode. All VCO tuning inductors are also integrated.The IF and RF output frequencies are set by programming the N-Divider registers, NRF1, NRF2and NIF. Programming the N-Divider register for either RF1 or RF2 automatically selects the properVCO. The output frequency of each PLL is as follows:fOUT= N×fφThe DIV2 bit in register 31h controls a programmable divider at the XIN pin to allow either a 13 or 26MHz reference frequency. For receive mode, the RF1 PLL phase detector update rate (fφ ) shouldbe programmed fφ = 100 kHz for DCS 1800 or PCS 1900 bands, and fφ = 200 kHz for GSM 850and E-GSM 900 bands. For transmit mode, the RF2 and IF PLL phase detector update rates arealways fφ =200 kHz.4.2.5.2 VC-TCXO(Voltage Controlled Temperature Compensated Crystal Oscillator): U307This is the mobile station’s reference frequency source. Its frequency is 26MHz, this signal isapplied to the XOUT Buffer in Si4210 and the XOUT Buffer provides the 26MHz system referenceclock.
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