12.8. Main Block Diagram (4 of 6)! " # $ % & ' ()*+,-./012SCL0HDMI_5VDET1SD_YKEYSCAN(TV)MAIN_ONSUB_ONDT_SBIHDMI_CEC_OUTDT_SBOJTAG_TMSFORMAT_EDGEJTAG_TCKSDA0FPGA_MUTEHDMI_CEC_INBUS_SWJTAG_TDOFPGA_OKSW_OFF_DETE2PROM_SCLJTAG_TDIHDMI_INTTX3PE2PROM_SDASP_LTV_SOSTV_SOSAFTTCLKPSP_RTX2PHP_IN_RVCTP_LHP_IN_LTX1PSD_PBVCTP_RDT_SBISD_PRTX1NDT_SBOTX3NSDA1SDA0_DTKIDO_PWMDT_RSTSCL1SCL0_DTSRQTX0NVCTP_RSTTX0PKAN_PWMTCLKNTX2NSDA1MAIN_SW_DETSDA0SCL0FPGA_IIC_RSTSCL0SRQSCL0_DTSDA0SCL1SDA0_DTVCTP_RSTSUB9VSTBY1.8VD1801 D1803ADJ5VSTBY3.3V MAIN3.3VQ3861D3868MAIN9VSTBY1.8VMAIN9VD3860STBY3.3VD3861STBY3.3VD1810STBY3.3VQ3860D1822STBY1.8VD3865STB7VD1101MAIN5VQ1151D3862MAIN3.3VADJ5VSTBY3.3VSTBY3.3VSTB7VD1102D1823STBY3.3VSTBY1.8V*Q1150MAIN5VX4001STB7VD1811D3866Q3862D1821ADJ5VSUB9VD180269IIC BUS SW238VDD IC110124HDMI_CEC_INHDMI_CEC_OUT1(VIDEO/AUDIO/CONTROLLER/PANEL CONTROL)182173VCTP_RST(L:RESET) 289FPGA_IIC_RST(L:RESET)4615Q1141-1144ATSC_SW_OFF_DET18STBY+3.3VSTBY+1.8VTV_SOS(L:SOS)1115FPGA_OK(L:FPGA SOS)3318490HDMI_5VDET1(L:DET)3691HDMI_INT(L:INT) 88139SUB_ON(L:OFF/H:ON)106131MAIN_ON(L:OFF/H:ON)188REMOTE CONTROL1301101 618317721785STBY1.8V OVP73STBY1.8V SHORT SOS49STBY3.3V OVPIC1807MAIN5V SHORT SOSVINJTAG_TDIJTAG_TMS1VCTP_RSWVCTP_LA1626210997STBY+1.8V812910010168FOR FACTORY USEDVINBAO7011IC4002SBO71212STBY+3.3VTODT-BOARD(DT07)7811 SWSHORT SOS DETMAIN+5V,MAIN+9VIC1806MAIN9V SHORT SOS79INV.864RESETINV.7RESET2TV SOSVCC6161OUT14KEY_SCAN_POWER160IC18081761364122VDD8011179839848799144781433532SCL03 A21SDA02BAO26DT_SBI27DT_SBOMAIN+8V16225KIDO_PWMIN28165OUT172KAN_PWMIC4002KEYSCANAFT6FORMAT_EDGESDA171WPSTBY+3.3VSCLOVP DETSTBY+1.8VEEPROM142STBY+1.8VSBO1805190SUB5V208181VCC7IC11024189DT_SBOVCTPAV R1DT_SBIAV L312863STBY_LED(R)(H:LIT)72OUT10IC1803VOUT166382XTAL IN4XTAL OUTSDA1A810539EEPROM WPSCL158SUB5V10240MAIN+3.3V65SP_L68MAIN+5VSP_RCLK OUTMAIN+8VSRQ(L:SRQ)1FPGA_MUTE(L:MUTE)HP_IN_RDT_RST(L:RESET)HP_IN_LJTAG_TCK47JTAG_TDO48174ADJ5V1011415466FOR FACTORY USED60667SRQ191SCL0SDA0167140SCL0SUB9V_SENSE(L:SOS)SDA0(+5.6V)3SCL1(+5.6V)59SDA1159195272826242322212528