National Instruments PXI-7831R Where To Start

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© 2003 National Instruments Corp. All rights reserved.LabVIEW™, National Instruments™, NI™, ni.com™, and NI-VISA™ are trademarks of National Instruments Corporation.Product and company names mentioned herein are trademarks or trade names of their respective companies. For patentscovering National Instruments products, refer to the appropriate location: Help»Patents in your software, thepatents.txt file on your CD, or ni.com/patents.April 2003323256A-01Where to Start with the NI PXI-7831RThank you for purchasing a National Instruments PXI-7831R. Thisdocument explains how to set up the hardware system and use theNI PXI-7831R. This reconfigurable I/O (RIO) device has 96 digital I/O(DIO) lines, eight independent, 16-bit analog output (AO) channels, andeight independent, 16-bit analog input (AI) channels.A user-reconfigurable field-programmable gate array (FPGA) controls thedigital and analog I/O on the NI PXI-7831R. The FPGA on the RIO deviceallows you to define the functionality and timing of the device, whereastraditional multifunction I/O (MIO) devices have a fixed functionalityprovided by an application-specific integrated circuit (ASIC). You canchange the functionality of the FPGA on the RIO device by usingLabVIEW, a graphical programming environment, and the LabVIEWFPGA module to create and download a custom virtual instrument (VI) tothe FPGA. You can reconfigure the RIO device with a new VI at any time.Using LabVIEW, you can graphically design the timing and functionalityof the RIO device without having to learn the low-level programminglanguage or hardware description language (HDL) that is traditionally usedfor FPGA design.Note If you have LabVIEW and not the LabVIEW FPGA module, you cannot create newFPGA VIs. You can only create VIs that run in LabVIEW to control existing FPGA VIs.Some applications require tasks such as real-time, floating-pointprocessing or data logging while performing I/O and logic on the RIOdevice. You can use the LabVIEW Real-Time Module to perform theseadditional applications while also communicating with and controlling theRIO device.The RIO device contains flash memory to store VIs for instant loading ofthe FPGA when the system is powered on.ni.com