Input Error(Bit 5)Note I!IService Request This bit indicates that a service request has occurred. The bit is(Bit 6) latched until cleared by reading the status byte.Buffer not Empty(Bit 7)IERR DescriptionDTY-PERCDTY-WIDCDTY-TRIGCommentsDuty cycle not available in PERC. Anexternal voltage controls the Period andNOT the Duty CycleAs above. External voltage controls theWidth and NOT the Duty CycleAn external trigger signal generates thePeriod. The displayed Duty Cycle iscalculated from the internal Period. DTY isnot confirmed with the external periodThere are four types of error which set the input error bit in thestatus byte. The conditions which cause them and the descriptionused by the HP 8112A when replying to an IERR command arelisted below. The timing error bit is not latched, therefore a transienterror is only recorded by generating an SRQ.More than one error condition can occur at one time. When usingthe IERR command ensure that you allow for a reply containingmore than one error description.IERR DescriptionEWID-PERCCommentsThe external trigger input signal is passedthrough to the output. A Control inputcannot alter period, d.elay, or width.Identical returns are EWID-DELC andEWID-WIDCTRIG-PERCGATE-TRIG slopeEWID-TRIG slopeBoth inputs will attempt to control theperiod. This is not possible.Both EXT INPUT slopes selected. Eitherleading edge or trailing edge may bespecified but not both.As above. Either leading edge or trailingedge may be specified but not both.This bit is set when there is data in the HP 8112A input buffer.YOU can monitor this bit to determine if the instrument has finishedinterpreting a lone: nroerammine: message.Programming 6-17