SINTRO Selftest InterruptThe SINTRO interrupt request is activated by the ROM-based selftest firmwarewhen the self test sequence completes or whenever an idle self test failure isdetected. The host software reads the STR channel register to determine thetype of error detected. A more detailed description of the self test is containedin Chapter 4.SINTR1 LANIC InterruptThis interrupt is activated by either the ROM-based kernel firmware or by thedownloaded operational firmware to signal the host software that some event inthe LANIC has occurred. Host software reads the SR channel register todetermine what type of event has occurred. The types of events fall into twogroups:- those related to a command issued to LANIC by the host software, andthose resulting from internal LANIC operations.Interactive Command CompletionThis response is given when the LANIC completes the execution of aninteractive command. The command-specific bits of the response code containstatus and error codes whose meanings depend on the associated command asshown below.0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 150 0 0 Completion status Command code, , I I I , , , I I I02 -0304 -08 -09 -OA -08 -Command codeCompletion status= Command code originally given= See below and paragraph "Self test"00 - command executed correctly01 sync between driver and LANIC established(e.g., an all-ones word written into CR)illegal length commandcommand not foundcommand doesn't match lengthhost buffer crosses bank boundarynon-word address on download or dumpchecksum didn't check (DOWNLOAD command)illegal start address (START CODE command)Principles of Operation3-9