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GE PCIE-5565PIORC* Hardware Reference Manual Manual pdf 1 page image

GE PCIE-5565PIORC* Hardware Reference Manual

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Contents
  1. Table Of Contents
  2. Table Of Contents
  3. Table Of Contents
  4. Table Of Contents
  5. Table Of Contents
  6. Overview
  7. Figure 1 Block Diagram of PCIE-5565PIORC
  8. Figure 2 Typical Reflective Memory Network
  9. Handling and Installation
  10. Switch S1 and S2 Configuration
  11. Table 1-1 Example Node ID Switch S2 RFM-5565
  12. Figure 1-1 S1 and S2 Location PCIE-5565PIORC
  13. Physical Installation
  14. Front Panel Description
  15. LED Description
  16. Figure 1-4 LC Type Fiber-Optic Cable Connector
  17. Theory of Operation
  18. RFM-5565 Register Sets
  19. Interrupt Circuits
  20. Figure 2-1 Interrupt Circuitry Block Diagram
  21. Network Interrupts
  22. Rogue Packet Removal Operation
  23. Programming
  24. PCI Configuration Registers
  25. Table 3-3 PCI Command Register
  26. Table 3-4 PCI Status Register
  27. Table 3-6 PCI Class Code Register
  28. Table 3-10 PCI Built-in Self Test Register
  29. Table 3-12 PCI Base Address Register 1 for Access to Local Configuration Registers
  30. Table 3-14 PCI Base Address Register 3 for Access to Reflective Memory
  31. Table 3-17 PCI Cardbus CIS Pointer Register
  32. Table 3-22 PCI Interrupt Line
  33. Table 3-26 Power Management Capability Structure
  34. Table 3-30 Device Control Register Bit Definition
  35. Table 3-31 Device Status Register Bit Definition
  36. Table 3-34 Link Status Register Bit Definition
  37. Local Configuration Registers
  38. Table 3-36 Mode/DMA Arbitration Register
  39. Table 3-38 Interrupt Control and Status Register
  40. Table 3-41 PCI Core/Features Revision ID
  41. Table 3-45 DMA Channel 0 Transfer Size (Bytes) Register
  42. Table 3-48 DMA Channel 0 PCI Dual Address Cycles Upper Address
  43. RFM Control and Status Registers
  44. Board Revision Register
  45. Local Interrupt Control Registers
  46. Network Target Data Register
  47. Network Interrupt Command Register
  48. Interrupt 2 Sender Data FIFO
  49. Figure 3-1 Block Diagram of the Network Interrupt Reception Circuitry
  50. Example of a Block DMA Operation for RFM-5565
  51. Example of a Scatter-Gather DMA Operation for RFM-5565
  52. Example of a PCI PIO Sliding Window Operation for RFM-5565
  53. Example of Network Interrupt Handling
  54. Maintenance
  55. Compliance Information
GE PCIE-5565PIORC* Hardware Reference Manual Manual pdf 1 page image
GEIntelligent PlatformsPublication No: 500-9367875565-000 Rev. AHardware ReferencePCIE-5565PIORC*Ultrahigh Speed Fiber-Optic Reflective Memorywith InterruptsTHE PCIE-5565PIORC IS DESIGNED TO MEET THE EUROPEAN UNION (EU) RESTRICTION OF HAZARD-OUS SUBSTANCE (ROHS) DIRECTIVE (2002/95/EC) CURRENT REVISIO N.
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PCI-5565PIORC*PCIE-5565PIORC*
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