CHAPTER 8: APPLICATION OF SETTINGS SETTINGS EXAMPLEC70 CAPACITOR BANK PROTECTION AND CONTROL SYSTEM – INSTRUCTION MANUAL 8-198The pickup setting for the stage 2 current unbalance trip element is specified as the unbalance current during maximumsystem conditions midway between the third and fourth capacitor element failure unbalance currents.Eq. 8-26Therefore, the trip delay is chosen 50 ms.8.4.7 Bank phase overvoltage settingsTo protect the capacitor bank from overvoltage resulting from abnormal system conditions, the capability of the bank towithstand transient overvoltages must be evaluated according to the IEEE 1036-1992 standard or to manufacturerspecifications. For example, consider the following manufacturer overvoltage data:• 2 pu overvoltage toleration for 0.25 second• 1.5 pu overvoltage toleration for 15 seconds• 1.25 pu overvoltage toleration for 5 minutesWhen the relay settings are calculated, the number of prospective overvoltage transients stressing the capacitor insulationduring the bank lifetime must be taken into account. As such, it is preferable to set the relay conservatively.60P trip I unbal f4_max( ) I unbal f3_max( )+2----------------------------------------------------------------- 0.0904 pu 0.0660 pu+2---------------------------------------------------- 0.078 pu= = =
