MB95630H SeriesMN702-00009-2v0-E FUJITSU SEMICONDUCTOR LIMITED 321CHAPTER 18 8/16-BIT PPG18.7 Registers18.7.1 8/16-bit PPG timer n1 Control Register (PCn1)The 8/16-bit PPG timer n1 control register (PCn1) sets the operating conditionsfor PPG timer n1.■ Register Configuration■ Register Functions[bit7:6] Undefined bitsTheir read values are always "0". Writing values to these bits has no effect on operation,[bit5] PIE1: Interrupt request enable bitThis bit controls interrupts of PPG timer n1.The bit outputs an interrupt request (IRQ) when the counter borrow detection bit (PUF1) and the PIE1 bit areboth set to "1".[bit4] PUF1: Counter borrow detection flag bit for PPG cycle downcounterThis bit serves as the counter borrow detection flag for the PPG cycle downcounter of the PPG timer n1.This bit is set to "1" when a counter borrow occurs in 8-bit PPG independent mode or 8-bit prescaler + 8-bitPPG mode.In 16-bit PPG mode, this bit is not set to "1" even when a counter borrow occurs.Writing "1" to this bit has no effect on operation. Writing "0" to this bit clears it.When read by the read-modify-write (RMW) type of instruction, this bit always returns "1".[bit3] POEN1: Output enable bitThis bit enables or disables the PPG timer n1 pin output.Setting this bit to "1" in 16-bit PPG mode sets the PPG timer n1 pin as an output pin. (The setting value ofREV01 is output. "L" output is supplied when REV01 is "0".)bit 7 6 5 4 3 2 1 0Field — — PIE1 PUF1 POEN1 CKS12 CKS11 CKS10Attribute — — R/W R/W R/W R/W R/W R/WInitial value 0 0 0 0 0 0 0 0bit5 DetailsWriting "0" Disables the PPG timer n1 interrupt.Writing "1" Enables the PPG timer n1 interrupt.bit4 DetailsReading "0" Indicates that no counter borrow of PPG timer n1 has been detected.Reading "1" Indicates that a counter borrow of PPG timer n1 has been detected.Writing "0" Clears this bit.Writing "1" Has no effect on operation.bit3 DetailsWriting "0" The PPG timer n1 pin functions as a general-purpose I/O port.Writing "1" The PPG timer n1 pin functions as a PPG output pin.
