Advantech AIMB-251 Series User Manual

Contents

Advantech AIMB-251 Series User Manual Manual pdf 19 page image

User’s ManualAIMB-251 Series User’s Manual 19• Integrated LAN controller• System Management Bus (SMBus) compatible with most IC devices; ICH4 has bothbus master and slave capability• AC ’97 2.3 compliant link for audio and telephony codecs; up to 6 channels• Low Pin Count (LPC) interface• FWH Interface (FWH Flash BIOS support)• Alert on LAN* (AOL and AOL2)1.6.3 Intel 852GM and ICH4The Intel 852GM GMCH component provides the processor interface, DDR SDRAMinterface, display interface, and Hub Interface in an Intel 852GM chipset platform. The Intel852GM GMCH is optimized for the Mobile Intel Pentium 4 Processor-M, Mobile IntelCeleron processor and Intel Celeron M processor. It supports a single channel of DDRSDRAM memory. Intel 852GM Chipset contains advanced power management logic. TheIntel 852GM Chipset platform supports the fourth generation mobile I/O Controller Hub toprovide the features required by a mobile platform.The Intel 852GM GMCH is in a 732-pin Micro-FCBGA package and contains the followingfunctionality:• Supports single Intel processor configurations at 400-MHz or 3 GB/s• 1.2-1.30-V AGTL+ host bus supporting 32-bit host bus addressing with EnhancedIntel SpeedStep® technology (Intel Celeron M processor and Intel CeleronProcessor do not support Enhanced Intel SpeedStep Technology).• System Memory supports 200/266-MHz (SSTL_2) DDR DRAM Up to 1 GB (with256-Mb technology and two SO-DIMMs) of PC1600/2100 DDR SDRAM withoutECC• Integrated graphics capabilities, including 3D rendering acceleration and 2Dhardware acceleration• Integrated 350-MHz, 24-bit RAMDAC with pixel resolution up to 1600x1200 at 85-Hzand up to 1920x1440 @ 60 Hz• One Dedicated Dual Channel LFP LVDS interface with frequency range of 25 MHzto 112 MHz (single channel/dual channel) for support up to SXGA+ (1400x1050 @60 Hz) panel resolutions with maximum pixel depth of 18-bpp• Integrated PWM (Pulse Width Modulation) interface for LFP backlight invertercontrol for panel brightness• One 165-MHz, 12-bit, DVO interface for TV-out encoder and DVI (LVDS transmitterand TMDS transmitter) support I 2C and DDC channels supported• Dual Pipe Independent Display with Tri-view support through LFP, DVO, and CRT• Deeper Sleep state support