Chapter 4 103BDS & Specific action:0x27 Enable DRAM Channel I/O Buffers0x28 Enable all clocks on populated rows0x29 Perform JEDEC memory initialization for all memory rows0x30 Perform steps required after memory init0x31 Program DRAM throttling and throttling event registers0x32 Setup DRAM control register for normal operation and enable0x33 Enable RCOMP0x34 Clear DRAM initialization bit in the SB0x35 Initialization Sequence Completed, program graphic clocks0xAF Disable access to the XMM registersCode Component0x00 Report the legacy boot is happening0x12 Wake up the APs0x13 Initialize SMM Private Data and relocate BSP SMBASE0x21 PC init begin at the stage10x27 Report every memory range do the hard ware ECC init0x28 Report status code of every memory range0x50 Get the root bridge handle0x51 Notify pci bus driver starts to program the resource0x58 Reset the host controller0x5A IdeBus begin initialization0x70 Simple Text Output Protocol Functions (VGA class reset)0x71 Report that VGA Class driver is being disabled0x72 Report that VGA Class driver is being enabled0x78 Terminal Console In reset and Console Out reset0x79 Report that the remote terminal is being disabled0x7A Report that the remote terminal is being enabled0x90 Keyboard reset0x91 USB Keyboard disable0x92 Keyboard detection0x93 Report that the usb keyboard is being enabled0x94 Clear the keyboard buffer0x95 Init Keyboard0x98 Mouse reset0x99 Mouse disable0x9A Detect PS2 mouse0x9B Report that the mouse is being enabled0xB8 Peripheral removable media reset (ex: Is a Floppy, USB device)0xB9 Peripheral removable media disable0xBB Peripheral removable media enable0xE4 Report Status Code here for DXE_ENTRY_POINT once it is availableCode Component
