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Acces PCI-IDI-XX User Manual
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Chapter 5: ProgrammingThe base address is assigned by the computer system during installation and will fall on an eight byteboundary. The card’s read and write functions are as follows:Address Read WriteBase Address + 0 Port 0 Low Byte N/ABase Address + 1 Port 0 High Byte N/ABase Address + 2 Port 1 Low Byte N/ABase Address + 3 N/A N/ABase Address + 4 Port 1 High Byte N/ABase Address + 5 Port 2 Low Byte N/ABase Address + 6 Port 2 High Byte N/ABase Address + 7 IRQ Status Register/IRQ Clear IRQ Enable/DisableNote: Base + 7 bit 7 only applies to COS (“C”) boardsRead Base + 0 (+1, +2, +4, +5, +6)Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0D7 of inputdataD6 of inputdataD5 of inputdataD4 of inputdataD3 of inputdataD2 of inputdataD1 of inputdataD0 of inputdataReading a byte from the Port Data Base Address reads the 8 bits associated with that half of a port. TheAddresses labeled “Low Byte” are associated with pins 1 through 25, and the Addresses labeled “HighByte” are associated with pin 26 through 50, as shown in Chapter 6, connector pin assignments.Writing to these addresses has no effect.Address Base +7 is used to control and monitor Change-of-State IRQs. To enable COS IRQs, write a “1"to bit 7; disable by writing “0" to bit 7. This enable status can be read back; that is, a read from Base +7will show bit 7 High (“1") while COS IRQs are enabled. While COS IRQs are enabled, any change of inputlevel (low-to-high or high-to-low) on any of the 48 bits will cause an IRQ to be generated. After an IRQ isgenerated, bit 6 of Base +7 will be set Low (“0"), which can be used to confirm that a shared interrupt wasgenerated by this card. Any read of Base +7 will clear the IRQ latch and return bit 6 to its High (“1") state.Please note: Enabling or Disabling IRQs does not clear the IRQ latch. If you disable IRQs while one ispending, it is still required to read from Base +7 to clear the pending IRQ.Read Base + 7: COS Status RegisterBit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0IRQEnableStatusIRQStatus(ActiveLow)N/A N/A N/A N/A N/A N/AManual PCI-IDI-XX Series13 |
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