Appendix A – Watchdog Timer Programming60Fanless Embedded Box PC AEC-6613A.1 Watchdog Timer ProgrammingAEC-6613 utilizes the ITE 8783 chipset as its watchdog timer controller. Below are theprocedures to complete its configuration and the AAEON initial watchdog timerprogram is also attached based on which you can develop customized program to fityour application.Configuring Sequence DescriptionAfter the hardware reset or power-on reset, the ITE 8783 enters the normal modewith all logical devices disabled except KBC. The initial state (enable bit ) ofthis logical device (KBC) is determined by the state of pin 121 (DTR1#) at the fallingedge of the system reset during power-on reset.There are three steps to complete the configuration setup: (1) Enter the MB PnP Mode;(2) Modify the data of configuration registers; (3) Exit the MB PnP Mode. Undesiredresult may occur if the MB PnP Mode is not exited normally.(1) Enter the MB PnP ModeTo enter the MB PnP Mode, four special I/O write operations are to be performedduring Wait for Key state. To ensure the initial state of
