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Fujitsu MHR2020AT manuals

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MHR2020AT

Brand: Fujitsu | Category: Storage
Table of contents
  1. revision history
  2. operating environment
  3. important alert items
  4. manual organization
  5. Table Of Contents
  6. Table Of Contents
  7. Table Of Contents
  8. Table Of Contents
  9. Table Of Contents
  10. Table Of Contents
  11. Table Of Contents
  12. Table Of Contents
  13. CHAPTER 1 Device Overview
  14. Features
  15. Interface
  16. Device Specifications
  17. Model and product number
  18. Table 1.3 Current and power dissipation
  19. Environmental Specifications
  20. Acoustic Noise
  21. Reliability
  22. Error Rate
  23. CHAPTER 2 Device Configuration
  24. Device Configuration
  25. Figure 2.2 Configuration of disk media heads
  26. System Configuration
  27. CHAPTER 3 Installation Conditions
  28. Dimensions
  29. Mounting
  30. Figure 3.3 Mounting frame structure
  31. Figure 3.4 Location of breather
  32. Figure 3.5 Surface temperature measurement points
  33. Figure 3.6 Service area
  34. Figure 3.7 Handling cautions
  35. Cable Connections
  36. Cable connector specifications
  37. Power supply connector (CN1)
  38. Factory default setting
  39. CSEL setting
  40. Power Up in Standby setting
  41. CHAPTER 4 Theory of Device Operation
  42. Outline
  43. Spindle
  44. Circuit Configuration
  45. Figure 4.2 Power Supply Configuration
  46. Figure 4.3 Circuit Configuration
  47. Power-on Sequence
  48. Self-calibration
  49. Execution timing of self-calibration
  50. Command processing during self-calibration
  51. Figure 4.5 Read/write circuit block diagram
  52. Read circuit
  53. Digital PLL circuit
  54. Servo Control
  55. Data-surface servo format
  56. Figure 4.8 Physical sector servo configuration on disk surface
  57. Servo frame format
  58. Actuator motor control
  59. Spindle motor control
  60. CHAPTER 5 Interface
  61. Physical Interface
  62. Signal assignment on the connector
  63. Logical Interface
  64. I/O registers
  65. Command block registers
  66. Control block registers
  67. Host Commands
  68. Table 5.3 Command code and parameters
  69. Command descriptions
  70. Figure 5.2 Execution example of READ MULTIPLE command
  71. Table 5.4 Information to be read by IDENTIFY DEVICE command
  72. Table 5.5 Features register values and settable modes
  73. Table 5.6 Diagnostic code
  74. Table 5.7 Features Register values (subcommands) and functions
  75. Table 5.8 Format of device attribute value data
  76. Table 5.10 Log Directory Data Format
  77. Table 5.11 Data format of SMART Summary Error Log (1/2)
  78. Table 5.12 SMART self test log data format
  79. Table 5.13 Contents of security password
  80. Table 5.14 Contents of SECURITY SET PASSWORD data
  81. Table 5.15 Relationship between combination of Identifier and Security level and operation of the lock function
  82. Table 5.16 DEVICE CONFIGURATION IDENTIFY data structure
  83. Error posting
  84. Command Protocol
  85. Figure 5.3 Read Sector(s) command protocol
  86. PIO Data transferring commands from host to device
  87. Commands without data transfer
  88. Figure 5.6 Protocol for the command execution without data transfer
  89. Other commands
  90. Figure 5.7 Normal DMA data transfer
  91. Ultra DMA Feature Set
  92. Phases of operation
  93. The data in transfer
  94. Terminating an Ultra DMA data in burst
  95. Ultra DMA data out commands
  96. Pausing an Ultra DMA data out burst
  97. Terminating an Ultra DMA data out burst
  98. Ultra DMA CRC rules
  99. Series termination required for Ultra DMA
  100. Timing
  101. Multiword data transfer
  102. Ultra DMA data transfer
  103. Ultra DMA data burst timing requirements
  104. Table 5.19 Ultra DMA sender and recipient timing requirements
  105. Sustained Ultra DMA data in burst
  106. Host pausing an Ultra DMA data in burst
  107. Device terminating an Ultra DMA data in burst
  108. Host terminating an Ultra DMA data in burst
  109. Initiating an Ultra DMA data out burst
  110. Sustained Ultra DMA data out burst
  111. Device pausing an Ultra DMA data out burst
  112. Host terminating an Ultra DMA data out burst
  113. Device terminating an Ultra DMA data out burst
  114. Power-on and reset
  115. CHAPTER 6 Operations
  116. Device Response to the Reset
  117. Response to hardware reset
  118. Figure 6.2 Response to hardware reset
  119. Response to software reset
  120. Response to diagnostic command
  121. Power Save
  122. Defect Processing
  123. Figure 6.5 Sector slip processing
  124. Figure 6.6 Alternate cylinder assignment processing
  125. Read-ahead Cache
  126. Using the read segment buffer
  127. Sequential reading
  128. Full hit
  129. Partial hit
  130. Write Cache
  131. acronyms and abbreviations
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