Aaeon BOXER-6652 manuals
BOXER-6652
Table of contents
- copyright notice
- Table Of Contents
- Table Of Contents
- Table Of Contents
- Table Of Contents
- Chapter 1 - Product Specifications
- Specifications
- Chapter 2 – Hardware Information
- Dimensions
- List of Jumpers
- Front Panel Connector (JP1)
- LVDS Port Backlight Control Inverter VCC Selection (JP3)
- COM1 Ring Function Selection (JP7)
- COM4 Termination Selection (DTR4) (JP11)
- Clear COMS2 Jumper (CN24)
- List of Connectors
- Audio Connector (CN1)
- COM Port 5 and 6 (D-SUB9) (CN3)
- V/+12V Output for SATA HDD (CN4)
- LVDS Port Inverter / Backlight Connector (CN6)
- CFast Slot (CN8)
- COM Port 6 (Wafer BOX, Optional) (CN9)
- SATA2.0 Connector (CN11)
- PSON# Output (CN13)
- SATA2.0 Connector (CN16)
- MiniCard Slot (Half-MiniCard) (CN18)
- PS/2 Keyboard/Mouse Combo Port (CN19)
- PCH Digital IO Port (CN20)
- Digital IO Port (CN22)
- USB2.0 Port 8 and 9 (Wafer BOX, Optional) (CN29)
- USB3.0 (Wafer BOX, Optional) (CN30)
- External Power Input (CN31)
- HDMI Port (CN33)
- LAN (RJ-45)+ Dual USB2.0 (CN34)
- COM Port 1 and 2 (D-SUB 9) (CN35)
- COM Port 3 and 4 (D-SUB 9) (CN36)
- Adapter Power in Connector (CN37)
- LAN2 LED (LED 1)
- LAN1 LED (LED 2)
- Installing Components
- Installing MiniCard
- Installing CFast/ SIM Card
- Installing HDD
- Installing RAM
- Chapter 3 - AMI BIOS Setup
- System Test and Initialization
- AMI BIOS Setup
- Setup Submenu: Main
- Setup Submenu: Advanced
- F81866 Super IO Configuration
- Configuration
- Advanced: F81866 H/W Monitor
- Advanced: Power Management
- Advanced: CPU Configuration
- Advanced: AMT Configuration
- Advanced: Trusted Computing
- Advanced: SATA Configuration
- Advanced: USB Configuration
- Advanced: Dynamic Digital IO
- Setup submenu: Chipset
- Chipset: PCH-IO Configuration
- Chipset: System Agent (SA) Configuration
- Setup submenu: Boot
- Boot: BBS Priorities
- Setup submenu: Security
- Setup submenu: Save & Exit
- Chapter 4 – Drivers Installation
- Product CD/DVD
- Appendix A - Watchdog Timer Programming
- A.1 Watchdog Timer Initial Program
- Appendix B - I/O Information
- B.1 I/O Address Map
- B.2 Memory Address Map
- B.3 IRQ Mapping Chart
- B.4 DMA Channel Assignments