12.5. Main Block Diagram (1 of 6)! " # $ % & ' ()*+,-./012GRSUB_ONTV_SOSHDMI_HPD1CEC_OFFHDMI_CEC_OUTVCTP_VSHDMI_CEC_INHDMI_EEP_WPHDMI_5VDET1HDMI_MUTESCL0SDA0HDMI_RSTHDMI_INTVCTP_CLKVCTP_HSVCTP_DENKEYSCAN(TV)RX_WSMAIN_SW_DETRX_SCKPANEL_ONRX_SDOINV_ONMAIN_ONQ5023G1D1S1G2D2S2Q1002Q5008G1D1S1G2D2S2BT30VD1001MAIN5VQ5002MAIN9VMAIN3.3VJK38MAIN5VMAIN3.3VQ5003JK500212345678910111213141516171819MAIN5VMAIN3.3VMAIN5VD5026D5022Q5022STB7VX500128.322MHzPANEL12VSUB9VSOUND_18.5VMAIN3.3V322HDMI_VSHDMI_DE21HDMI_HS121HDMI_CLK9697XTALINXTALOUT102 104MAIN_9VRESETINTIC5004HDMI RECEIVER1EDID_dataSUB_9V357MAIN+1.8V12MUTEOUTCTL6OUT14VCC15IC5005AP333R1PWR5VWSCEC(Consumer Electronics Control)ROX0-STB_7VCEC OFFKEYSCANSD0ROX2-ROXC-TMDS DECODERHOT PLUG DETECT1TMDS DATAEEPROMAP4ANDSUB_9VTV_SUB_ONQ5018,5019,5020,5021,50241TV_MAIN_ONALL_OFF2827TV_SOSPANEL_12V2CSDAPANEL_12VCEC CIRCUITCSCL39DSDA040DSCL043344447R0PWR5V3487751ROX0+D0GRECEIVER52D0-847HDMI1 IN85D2G+5V86AUDIOD1GCLK+MAIN 3.3VINTERFACEMAIN 1.5VD1-110D1+113INV_ONSDA126PANELVCC_ON12317SCL7HDMI_Y0-Y7INTERFACECLK-ROX1+HDMI_UV0-UV78CECSOUND_VCC11611D0+SCK11918ROXC+18INVERTER132CIPHER DECRYPTORDIGITAL VIDEO SIGNAL (HDMI)SOUND_VCC129D2-5VHIGH:MUTE19D2+3.3VHDMI_SCL32BT_30VHDMI_SDA31HPDT8MAIN_9V76MAIN_9VHDCP522ROX2+VCCA3WPMAIN_5VSCLROX1- VIDEOSDAIC500222POWER LED1A4MAIN_5V2FRONT TEGIR/LEDVMAIN(VCTP,FPGA,MEMORY,REAR TERMINAL)A25