PinNo.Mark I/ODivisionFunction1 RVDD 3 I Power supply to internalDRAM2 RVDD 18 O Voltage regulator outputterminal (Connects tointernal DRAM supplyterminal)3 RVDD 23 — Voltage regulator inputterminal (Accepts a supplyvoltage identical to that forIO pad)4 LON I Voltage regulator ON/OFFcontrol signal inputterminal (1:ON, 2:OFF)5 TMDISY O Microprocessor interruptsignal 3 output terminal(for monitoring)6 TSGSYNCO ATRAC frame sync. signaloutput terminal (formonitoring)7 MONI6 O Monitor signal outputterminal 68 MONI5 O Monitor signal outputterminal 59 NRST I Chip Reset signal inputterminal (O:reset)10 SELAD I Microprocessor IF addressdata select signal inputterminal11 SSCK I Microprocessor IF shiftclock signal input terminal12 SSDW I Microprocessor IF writedata input terminal13 SSDR O Microprocessor IF readdata output terminal14 NRQ O Microprocessor interruptsignal 1 output terminal15 MDASCSYO Microprocessor interruptsignal 2 output terminal16 FG I FG input terminal17 TRDP O Tracking drive (+) PWMsignal output terminal18 TRDM O Tracking drive (-) PWMsignal output terminal46