Advantech PCI-7030 User Manual

Also see for PCI-7030: Startup manual

Contents

Advantech PCI-7030 User Manual Manual pdf 45 page image

33 PCI-7030 User ManualChapter 3 BIOS Operation! DRAM Timing Selectable [By SPD]This item enables users to set the optimal timings for items 2 through 5; systemdefault setting ìBy SPDî follows the SPD information and ensures the systemruns stably with optimal performance.! CAS Latency Time [Auto]This item enables users to set the timing delay in clock cycles before SDRAMstarts a read command after receiving it.! DRAM RAS# to CAS# Delay [Auto]This item enables users to set the timing of the transition from RAS (rowaddress strobe) to CAS (column address strobe) as both rows and column areseparately addressed shortly after DRAM is refreshed.! DRAM RAS# Precharge [Auto]This item enables users to set the DRAM RAS# precharge timing, systemdefault is setting to ìAutoî to reference the data from SPD ROM.! Precharge delay (tRAS) [Auto]This item allows user to adjust memory precharge time.! Video BIOS Cacheable [Disabled]This item allows the video BIOS to be cached to allow faster execution and bet-ter performance.! On-Chip Frame Buffer Size [8 MB]This item allows the user to adjust the on-chip frame buffer size 8 MB or 1 MB.! DVMT Mode [DVMT]This item allows the user to adjust Intel's Dynamic Video Memory Technology(DVMT). BIOS provides three options: DVMT, FIXED, and Both.! DVMT/FIXED Memory Size [128MB]This item allows the user to adjust DVMT/FIXED graphics memory size.! Boot DisplayThis item allows the user to decide boot display mode.! Panel NumberThis item allows the user to decide display resolution.! Init Display FirstThis item is the setting for start up video output: either from PCI Express orOnboard device.